cfelton / test_jpeg / 127
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DEFAULT BRANCH: master
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Jobs 4
Files 16
Run time 6min
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127

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cfelton 
Added missing ghdl makefile

A second makefile used for the v1 reference VHDL simulation
with GHDL was missing.  Minor edits to the first makefile.

256 of 260 relevant lines covered (98.46%)

0.98 hits per line

Jobs
ID Job ID Ran Files Coverage
1 127.1 0
98.46
 Travis Job 127.1
2 127.2 0
98.46
 Travis Job 127.2
3 127.3 0
98.46
 Travis Job 127.3
4 127.4 0
98.46
 Travis Job 127.4
Source Files on build 127
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