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nickg / nvc / 6604807552
93%
master: 93%

Build:
Build:
LAST BUILD BRANCH: test
DEFAULT BRANCH: master
Ran 22 Oct 2023 04:13PM UTC
Jobs 1
Files 70
Run time 4s
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22 Oct 2023 04:00PM UTC coverage: 91.21% (+0.003%) from 91.207%
6604807552

push

github

nickg
Parse Verilog inout ports

6 of 6 new or added lines in 2 files covered. (100.0%)

49618 of 54400 relevant lines covered (91.21%)

588200.77 hits per line

Uncovered Existing Lines

Lines Coverage ∆ File
11
92.12
0.04% src/lexer.l
12
96.14
0.35% src/vlog/vlog-parse.y
12
76.81
-2.6% src/vlog/vlog-pp.l
14
92.16
-0.03% src/jit/jit-exits.c
32
86.67
0.54% src/scan.c
42
58.22
0.18% src/nvc.c
53
94.91
-0.19% src/rt/model.c
Jobs
ID Job ID Ran Files Coverage
1 6604807552.1 22 Oct 2023 04:13PM UTC 70
91.21
GitHub Action Run
Source Files on build 6604807552
  • Tree
  • List 70
  • Changed 52
  • Source Changed 0
  • Coverage Changed 10
Coverage ∆ File Lines Relevant Covered Missed Hits/Line
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