SystemRDL / systemrdl-compiler / 323
94%
main: 91%

LAST BUILD BRANCH: v1.32.1
DEFAULT BRANCH: main
Ran
Jobs 5
Files 33
Run time 3min
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amykyta3 
Implement Verilog Preprocessor. Reworked source reference insfrastructure. #41

Add type hints to some visitors.
Fixed error message bug
Verilog preprocessor unit tests

1152 of 1374 branches covered (83.84%)

Branch coverage included in aggregate %.

4508 of 4786 relevant lines covered (94.19%)

4.7 hits per line

Jobs
ID Job ID Ran Files Coverage
1 323.1 (CIBW_SKIP="cp27-* *macosx_10_6*" SYSTEMRDL_REQUIRE_BINARY_BUILD=) 0
91.81
 Travis Job 323.1
2 323.2 (CIBW_SKIP="cp27-* *macosx_10_6*" SYSTEMRDL_REQUIRE_BINARY_BUILD=) 0
91.8
 Travis Job 323.2
3 323.3 (CIBW_SKIP="cp27-* *macosx_10_6*" SYSTEMRDL_REQUIRE_BINARY_BUILD=) 0
91.8
 Travis Job 323.3
4 323.4 (CIBW_SKIP="cp27-* *macosx_10_6*" SYSTEMRDL_REQUIRE_BINARY_BUILD=) 0
91.8
 Travis Job 323.4
5 323.5 (CIBW_SKIP="cp27-* *macosx_10_6*" SYSTEMRDL_REQUIRE_BINARY_BUILD=) 0
91.8
 Travis Job 323.5
Source Files on build 323
Detailed source file information is not available for this build.