leonardt / verilogAST-cpp / 458
100%
master: 98%

LAST BUILD BRANCH: simplify-regex
DEFAULT BRANCH: master
Ran
Jobs 2
Files 8
Run time 1min
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458

Pull #44

travis-ci-com

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Add interpolated_symbols logic to inline verilog
Pull Request #44: Add interpolated_symbols logic to inline verilog

9 of 9 new or added lines in 3 files covered. (100.0%)

921 of 924 relevant lines covered (99.68%)

97.97 hits per line

Jobs
ID Job ID Ran Files Coverage
1 458.1 (MATRIX_EVAL="CC=gcc-7 && CXX=g++-7 && GCOV=gcov-7") 0
99.68
 Travis Job 458.1
2 458.2 (MATRIX_EVAL="GCOV=gcov") 0
99.12
 Travis Job 458.2
Source Files on build 458
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