830
96%
master: 98%

Ran 08 Sep 2018 12:28AM UTC

Jobs 1

Files 23

Run time 5s

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Build # 830

Build Type

Pull #100

travis-ci-com

Committed by

web-flow

Commit Message

[Issue #99] Fix parsed verilog interface expectations

Commit phanrahan/magma@18943be changed how we parse verilog. In
particular, it changed Array(N, Bit) to Bits(N). All tests which
depended on that output are fixed.

Pull Request Pull Request #100: [Issue #99] Fix parsed verilog interface expectations

Run Details

643 of 671 relevant lines covered (95.83%)

0.96 hits per line

Uncovered Existing Lines

Lines	Coverage	∆	File
1	97.3	-0.68%	global_controller/global_controller.py

Jobs

ID	Job ID	Ran	Files	Coverage
1	830.1	08 Sep 2018 12:28AM UTC	23	95.83	Travis Job 830.1

StanfordAHA / garnet / 830
96%
master: 98%

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StanfordAHA / garnet / 830 96% master: 98%

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Textile

RDoc

HTML

Rst

Uncovered Existing Lines

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Source Files on build 830

StanfordAHA / garnet / 830
96%
master: 98%

README BADGES
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