SRI-CSL / yices2 / 1439 / 5
65%
master: 65%

LAST BUILD BRANCH: fix_crashes
DEFAULT BRANCH: master
Ran
Files 453
Run time 2min
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coverage: 64.643% (+0.6%) from 64.041%
BUILD_TYPE=gcov ENABLE_COVERAGE=ON CONFIGURE_FLAGS="--enable-mcsat"

Pull #283

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<a href="https://github.com/SRI-CSL/yices2/commit/<a class=hub.com/SRI-CSL/yices2/commit/2833713251ded69090478cc90d0f3d4b54476ed1">283371325<a href="https://github.com/SRI-CSL/yices2/commit/2833713251ded69090478cc90d0f3d4b54476ed1">">Merge </a><a class="double-link" href="https://github.com/SRI-CSL/yices2/commit/<a class="double-link" href="https://github.com/SRI-CSL/yices2/commit/e3d1482348ff43b735daa1b32b20dc5c7191f12b">e3d148234</a>">e3d148234</a><a href="https://github.com/SRI-CSL/yices2/commit/2833713251ded69090478cc90d0f3d4b54476ed1"> into b0c8adb93">b0c8adb93</a>
Pull Request #283: Adding solving modulo model assumptions

72836 of 112675 relevant lines covered (64.64%)

1447077.09 hits per line

Source Files on job 1439.5 (BUILD_TYPE=gcov ENABLE_COVERAGE=ON CONFIGURE_FLAGS="--enable-mcsat")