stewid / SimInf / 1486 / 6
95%
master: 95%

LAST BUILD BRANCH: v6.5.1
DEFAULT BRANCH: master
Ran
Files 41
Run time 3s
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Rst
coverage: 94.961% (+0.06%) from 94.903%
R_CODECOV=true R_LINTR=true

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travis-ci

stewid 
roxygen: change to use 'slots' tag to document the slots of a class

3128 of 3294 relevant lines covered (94.96%)

6674.42 hits per line

Source Files on job 1486.6 (R_CODECOV=true R_LINTR=true)