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main: 98%

Ran 23 Nov 2025 04:22PM UTC

Files 15

Run time 1s

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Committed 23 Nov 2025 04:18PM UTC coverage: 86.634%. First build

Job # 19613939129.1

Build Type

push

github

Committed by

ericsmacedo

Commit Message

Disable VHDL parsing

Adding Literal to dtype and ptype will require a different datamodel for the VHDL language.

VHDL parsing is also too limited to be considered as a supported language of the parser. Disabling it for now.

Run Details

538 of 621 relevant lines covered (86.63%)

12.96 hits per line

ericsmacedo / hdl-parser / 19613939129 / 1
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main: 98%

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Source Files on job 19613939129.1

ericsmacedo / hdl-parser / 19613939129 / 1 99% main: 98%

README BADGES x

Markdown

Textile

RDoc

HTML

Rst

Source Files on job 19613939129.1

ericsmacedo / hdl-parser / 19613939129 / 1
99%
main: 98%

README BADGES
x