• Home
  • Features
  • Pricing
  • Docs
  • Announcements
  • Sign In

Qiskit / qiskit / 15689080566 / 1
88%
main: 88%

Build:
Build:
LAST BUILD BRANCH: unitary-synthesis
DEFAULT BRANCH: main
Ran 16 Jun 2025 07:00PM UTC
Files 789
Run time 35s
Badge
Embed ▾
README BADGES
x

If you need to use a raster PNG badge, change the '.svg' to '.png' in the link

Markdown

Textile

RDoc

HTML

Rst

16 Jun 2025 06:38PM UTC coverage: 88.129% (-0.01%) from 88.14%
15689080566.1

push

github

web-flow
Fix classical bit mapping in HLS pass (#14597) (#14624)

* Map classical bits from block to outer circuit



* Add regression test

* Add reno

* Avoid allocating cargs

Previously the cargs were being written to a Vec<usize> as an
intermediate storage, however we are just returning them directly and
don't need to allocate or change the types. This commit just works with
the slice returned from the interner directly which both simplifies the
code and should also be faster.

---------



(cherry picked from commit 9ec464af4)

Co-authored-by: Elena Peña Tapia <57907331+ElePT@users.noreply.github.com>
Co-authored-by: Alexander Ivrii <alexi@il.ibm.com>
Co-authored-by: Matthew Treinish <mtreinish@kortar.org>

72952 of 82779 relevant lines covered (88.13%)

346838.58 hits per line

Source Files on job 15689080566.1
  • Tree
  • List 789
  • Changed 4
  • Source Changed 1
  • Coverage Changed 4
Coverage ∆ File Lines Relevant Covered Missed Hits/Line
  • Back to Build 15689080566
  • c85a925f on github
  • Prev Job for on gh-readonly-queue/stable/2.0/pr-14624-cdc292d10a9253312f948b40fbe6fb6611ab1fb7 (#15687854210.1)
STATUS · Troubleshooting · Open an Issue · Sales · Support · CAREERS · ENTERPRISE · START FREE · SCHEDULE DEMO
ANNOUNCEMENTS · TWITTER · TOS & SLA · Supported CI Services · What's a CI service? · Automated Testing

© 2026 Coveralls, Inc