• Home
  • Features
  • Pricing
  • Docs
  • Announcements
  • Sign In

SRI-CSL / yices2 / 9640329956 / 1
67%
master: 67%

Build:
DEFAULT BRANCH: master
Ran 24 Jun 2024 06:08AM UTC
Files 1625
Run time 40s
Badge
Embed ▾
README BADGES
x

If you need to use a raster PNG badge, change the '.svg' to '.png' in the link

Markdown

Textile

RDoc

HTML

Rst

24 Jun 2024 06:00AM UTC coverage: 66.469%. Remained the same
9640329956.1

push

github

web-flow
Update smt-logics.rst

88122 of 132577 relevant lines covered (66.47%)

1393204.86 hits per line

Source Files on job 9640329956.1
  • Tree
  • List 0
  • Changed 130
  • Source Changed 0
  • Coverage Changed 108
Coverage ∆ File Lines Relevant Covered Missed Hits/Line
  • Back to Build 9640329956
  • df2b7da5 on github
  • Prev Job for on master (#9593477890.1)
  • Next Job for on master (#9641173927.1)
STATUS · Troubleshooting · Open an Issue · Sales · Support · CAREERS · ENTERPRISE · START FREE · SCHEDULE DEMO
ANNOUNCEMENTS · TWITTER · TOS & SLA · Supported CI Services · What's a CI service? · Automated Testing

© 2026 Coveralls, Inc