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ARM64: Fix LDP/STP fusing for unaligned accesses. Thanks to Peter Cawley. (cherry picked from commit 0fa2f1cbc) The arm64 emitting of load/store operation works incorrectly in the case when at least one offset of load/store to be fused into ldp/stp is misaligned. In this case this misaligning is ignored, and instructions are fused, which leads to loading/storing from/to at least one incorrect address. For example, the following instructions: | stur w0, [x1, #17] | stur w0, [x1, #21] May be fused to the following: | stp w0, w0, [x1, #16] This patch prevents fusion in this case by testing the alignment with the help of bitwise ROR by the alignment value. In case of misaligned offset, the value overflows the 7-bit length mask in the check. The negative immediate (7-bit width including sign bit) is limited by the corresponding addition of `64 << sc` (it is harmless in the case of positive values). Sergey Kaplun: * added the description and the test for the problem Part of tarantool/tarantool#11278
5712 of 6046 branches covered (94.48%)
Branch coverage included in aggregate %.
21788 of 23508 relevant lines covered (92.68%)
3836069.56 hits per line
Coverage | ∆ | File | Lines | Relevant | Covered | Missed | Hits/Line | Branch Hits | Branch Misses |
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