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ARM64: Fix LDP code generation. Thanks to Zhongwei Yao. (cherry picked from commit 9493acc1a) When fusing two LDR (STR) instructions to the single LDP (STP) instruction, the arm64 emitter shifts the offset value to encode the immediate. In the case when the offset is negative, the resulting field value exceeds the 7-bit length of the immediate, see [1]. This results in the invalid instruction decoding. This patch fixes this by masking the value with the 7-bit-width mask `0x7f`. Sergey Kaplun: * added the description and the test for the problem [1]: https://developer.arm.com/documentation/ddi0602/2025-03/Base-Instructions/LDP--Load-pair-of-registers- Part of tarantool/tarantool#11278
5709 of 6046 branches covered (94.43%)
Branch coverage included in aggregate %.
21791 of 23508 relevant lines covered (92.7%)
3834881.36 hits per line
Coverage | ∆ | File | Lines | Relevant | Covered | Missed | Hits/Line | Branch Hits | Branch Misses |
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