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Fix classical bit mapping in HLS pass (#14597) (#14625) * Map classical bits from block to outer circuit * Add regression test * Add reno * Avoid allocating cargs Previously the cargs were being written to a Vec<usize> as an intermediate storage, however we are just returning them directly and don't need to allocate or change the types. This commit just works with the slice returned from the interner directly which both simplifies the code and should also be faster. --------- (cherry picked from commit 9ec464af4) Co-authored-by: Elena Peña Tapia <57907331+ElePT@users.noreply.github.com> Co-authored-by: Alexander Ivrii <alexi@il.ibm.com> Co-authored-by: Matthew Treinish <mtreinish@kortar.org>
5 of 5 new or added lines in 1 file covered. (100.0%)
4 existing lines in 3 files now uncovered.83047 of 94371 relevant lines covered (88.0%)
517362.2 hits per line
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