Qiskit / qiskit / 32696797058

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Commit Message

Update Register pack for QPY v18 (#16813)

* Update Register pack for QPY v18

This commit updates the register pack representation in QPY to shrink
the data requirements. The first change is that the bit indices are
switched from being a vec of 64bit signed integers using -1 as a
sentinel to u32::MAX. The address space is 32bits in qiskit's data model
is a u32 and u32::MAX is already used as a sentinel value in a similar
manner so we don't need to preserve the case of a u32::MAX index in the
bit indices since that's not valid in Qiskit's data model. This shrinks
the data size requirements of registers in a QPY payload in half. The
other major change is removing the need of the indices array in the case
the bit mapping is a contiguous range of indices. In these cases we only
need to store a single integer for the start position of the data. In
this case with the size we have the all the details necessary to build
the index map from the qpy data already. This can significantly shrink
the data size required for registers in most cases because typically
registers are added in a contiguous block and we reduce the space
required from 4 bytes * num_bits to 4 bytes.

* Bugfixes

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Co-authored-by: Gadi Aleksandrowicz <gadial@gmail.com>

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247 of 289 new or added lines in 4 files covered. (85.47%)

9 existing lines in 2 files now uncovered.

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