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bitshifter / glam-rs / 32471653433
99%

Build:
DEFAULT BRANCH: main
Ran 21 Aug 2026 10:15AM UTC
Jobs 4
Files 153
Run time 1min
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21 Aug 2026 10:13AM UTC coverage: 99.119% (-0.01%) from 99.131%
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feat(vec3a): add explicit padding to scalar Vec3A for bytemuck Pod/Zeroable and zerocopy IntoBytes (#786)

Fixes #122

## Problem

`Vec3A` is a 16-byte aligned type containing three `f32`s, so its scalar (`scalar-math`, and the no-SIMD fallback) representation has 4 bytes of trailing padding. That padding is uninitialized, so bytemuck could only
derive `AnyBitPattern` for scalar `Vec3A` (and `Mat3A`/`Affine3A`), not `Pod` + `Zeroable`. The SIMD backends don't have this problem because their fourth lane is a real value (`new` stores `[x, y, z, z]`).

## Change

Add an explicit `_w: f32` padding field to scalar `Vec3A`, initialized to `z` to mirror the SIMD backends' `[x, y, z, z]` storage. This means every byte is now initialized, which unlocks:

- `bytemuck::Pod` + `Zeroable` for scalar `Vec3A`, `Mat3A`, and `Affine3A` (`NoUninit` and `AnyBitPattern` come along automatically via bytemuck's blanket impls).
- `zerocopy::IntoBytes` for the same types (previously only `FromBytes`/`Immutable`/`KnownLayout`).

Scalar `Vec3A` now implements `PartialEq` manually so `_w` is ignored.

## Performance

The only added work in the materializing path is a single store that defines the padding lane. When the result is inlined and only `x`/`y`/`z` are read, that store is dead-code eliminated and the generated code is unchanged.

Probe:

```rust
#![allow(improper_ctypes_definitions)]
use glam::Vec3A;

#[no_mangle]
pub extern "C" fn probe_vec3a_add(a: Vec3A, b: Vec3A) -> Vec3A { a + b }

#[no_mangle]
pub extern "C" fn probe_vec3a_add_sum(a: Vec3A, b: Vec3A) -> f32 {
    let r = a + b;
    r.x + r.y + r.z
}
```

`probe_vec3a_add` before (`a867ca86`):

```asm
addss   xmm1, xmm3
addps   xmm0, xmm2
movss   dword ptr [rsp - 8], xmm1
movsd   xmm1, qword ptr [rsp - 8]   ; upper 4 bytes are uninitialized padding
ret
```

`probe_vec3a_add` after (`b465490b`):

```asm
addss   xmm3, xmm1
addps   xmm0, xmm2
movss   dword ptr [rsp - 8], xmm3
movss   dword ptr [rsp - 4], xmm3   ; <--... (continued)

4015 of 4025 new or added lines in 37 files covered. (99.75%)

71 existing lines in 19 files now uncovered.

91349 of 92161 relevant lines covered (99.12%)

126567.04 hits per line

Uncovered Changes

Lines Coverage ∆ File
1
98.54
0.1% src/i16/i16vec3.rs
1
98.53
0.1% src/i32/ivec3.rs
1
98.53
0.32% src/i64/i64vec3.rs
1
98.55
0.11% src/i8/i8vec3.rs
1
98.54
0.1% src/isize/isizevec3.rs
1
98.64
0.14% src/u16/u16vec3.rs
1
98.38
-0.12% src/u32/uvec3.rs
1
98.63
0.13% src/u64/u64vec3.rs
1
98.64
0.14% src/u8/u8vec3.rs
1
98.63
0.14% src/usize/usizevec3.rs

Coverage Regressions

Lines Coverage ∆ File
9
98.43
-1.09% src/f32/sse2/vec4.rs
6
92.05
-6.82% src/f32/math.rs
6
90.91
-9.09% src/f64/math.rs
5
86.84
0.0% src/coresimd.rs
3
96.0
-2.0% src/bool/neon/bvec3a.rs
3
97.87
-2.13% src/bool/sse2/bvec3a.rs
3
98.05
-1.95% src/bool/sse2/bvec4a.rs
3
99.7
-0.3% src/f32/coresimd/mat4.rs
3
98.56
-0.36% src/f32/coresimd/vec3a.rs
3
98.48
-0.38% src/f32/coresimd/vec4.rs
3
98.02
-0.5% src/f32/neon/mat3a.rs
3
98.73
-0.35% src/f32/neon/vec3a.rs
3
98.3
-0.36% src/f32/neon/vec4.rs
3
95.58
2.41% src/f32/sse2/quat.rs
3
98.85
0.0% src/f32/sse2/vec3a.rs
3
99.28
-0.32% src/i16/i16vec2.rs
3
98.93
-0.23% src/i8/i8vec4.rs
3
99.33
-0.33% src/u32/uvec2.rs
3
98.38
-0.12% src/u32/uvec3.rs
Jobs
ID Job ID Ran Files Coverage
1 scalar_math-ubuntu-latest - 32471653433.1 21 Aug 2026 10:15AM UTC 120
99.04
GitHub Action Run
2 native_simd-macos-latest - 32471653433.2 21 Aug 2026 10:15AM UTC 121
99.01
GitHub Action Run
3 native_simd-ubuntu-latest - 32471653433.3 21 Aug 2026 10:15AM UTC 121
99.02
GitHub Action Run
4 core_simd-ubuntu-latest - 32471653433.4 21 Aug 2026 10:15AM UTC 120
98.97
GitHub Action Run
Source Files on build 32471653433
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Coverage ∆ File Lines Relevant Covered Missed Hits/Line
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