SRI-CSL / yices2 / 28931509320
71%
master: 71%

LAST BUILD BRANCH: fix-bv64-interval-abstraction-ub
DEFAULT BRANCH: master
Ran
Jobs 1
Files 496
Run time 2min
Badge
Embed ▾
README BADGES
x

If you need to use a raster PNG badge, change the '.svg' to '.png' in the link

Markdown

Textile

RDoc

HTML

Rst
coverage: 71.21% (-0.003%) from 71.213%
28931509320

Pull #653

github

web-flow 
Merge eac4b4b0d into b11db7c43
Pull Request #653: Make the SMT-LIB 2.6 "" string escape the default (#417)

4 of 4 new or added lines in 2 files covered. (100.0%)

95545 of 134173 relevant lines covered (71.21%)

1665516.53 hits per line

Jobs
ID Job ID Ran Files Coverage
1 28931509320.1 496
71.21
 GitHub Action Run
Source Files on build 28931509320