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feat(bb_power_tps546): UV-fault hiccup response + STATUS-register diagnostic (#391)

handle the TPS546 vcore-latch class observed on bitaxe boards: a fault trips
the regulator off and it stays off until a physical power-cycle.

- configurable VOUT_UV_FAULT_RESPONSE via protect.vout_uv_fault_response
  (new field + 0x45 emit). 0xBF = shut down + continuous hiccup restart, so a
  transient undervoltage auto-recovers instead of latching vcore off — no
  power-cycle to recover. 0 = skip (default latch-off preserved). OV/OC/OT are
  intentionally left latch-off: auto-retrying into over-voltage/over-current
  can damage the load.
- dump STATUS_BYTE/WORD/VOUT/IOUT/INPUT/TEMP/CML/MFR at init before
  CLEAR_FAULTS, so a latched fault's cause is visible in the boot log instead
  of guessed at. read-only; does not gate init.
- declined non-critical limit writes (e.g. OV/UV warn 0x42/0x43, which some
  TPS546 parts reject) now log at info, not warning: the chip keeps its
  default and operation/fault protection is unaffected.

Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>

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