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feat(bb_display_ili9341): low-clock RDDID probe + skip-probe gate (#370)

The panel IO is created at the pixel clock (e.g. 40 MHz), but the ILI9341
cannot drive MISO for register reads above ~6.6 MHz, so RDDID (0xD3) clocked
back zeros and the probe always failed. Read the ID over a temporary low-clock
IO handle instead; pixel writes keep the fast handle.

- bb_display_spi_common: split bus-init from IO creation
  (bb_display_spi_init_bus_only + bb_display_spi_new_panel_io); keep
  bb_display_spi_init_bus as a back-compat wrapper (st77xx caller unchanged)
- bb_display_ili9341: separate bus_init_once from panel_io_init_once (fixes a
  latent short-circuit where panel_io_init_once returned true with a NULL
  s_io); probe creates a temp READ_CLK_HZ IO, reads RDDID, deletes it — s_io
  (the pixel handle) is never touched by the probe
- Kconfig BB_DISPLAY_ILI9341_READ_CLK_HZ (default 5 MHz, range 100k..10M)
- Kconfig BB_DISPLAY_ILI9341_SKIP_PROBE: register a NULL probe for boards whose
  LCD MISO/SDO is not wired (many CYD variants are write-only; even a 5 MHz read
  returns zeros there) — the panel is committed at build time

Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>

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