dangernoodle-io / TaipanMiner / 24900914328

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fix(asic): defensive telemetry baseline + sanity clamp (TA-221) (#176)

observed on bitaxe-650: chip 0 reports 3.6 TH/s and 99.9999% hw err from
boot; chip 1 normal. three of four chip-0 domains report 3.6 TH/s, one
normal. raw counters fine; derived ghs math blows up. root cause
uncertain — boot-phase glitch or register-read corruption.

two-layer defense:
- require 2 prior samples (not 1) before computing delta. first read
  sets the base, second read bootstraps the previous value, third+
  compute a clean delta. boolean *_init flags become uint8_t *_samples
  counters capped at 3.
- sanity clamp: per-chip 2000 gh/s, per-domain 500 gh/s. bm1370 theo
  max ~1300 gh/s; anything above 2000 is register-read garbage. drop
  the sample with a warning log.

no behavior change on healthy chips. catches the bogus reads that
dominate the 1m/10m rolling buffers from boot and poison the ui.

Co-authored-by: Claude Opus 4.7 <noreply@anthropic.com>

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