saitoha / libsixel / 19536872933
42%
master: 49%

LAST BUILD BRANCH: ci/refactor2
DEFAULT BRANCH: master
Ran
Jobs 1
Files 53
Run time 1min
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Rst
coverage: 40.985% (-0.2%) from 41.21%
19536872933

push

github

saitoha 
feat: add parallel band dithering pipeline

9706 of 33620 branches covered (28.87%)

47 of 294 new or added lines in 8 files covered. (15.99%)

4 existing lines in 4 files now uncovered.

12712 of 31016 relevant lines covered (40.99%)

660711.12 hits per line

New Missed Lines in Diff

Lines Coverage ∆ File
7
0.0
 0.0% src/dither-varcoeff-8bit.c
7
0.0
 0.0% src/dither-varcoeff-float32.c
8
0.0
 0.0% src/dither-fixed-float32.c
17
0.0
 0.0% src/dither-positional-8bit.c
24
0.0
 0.0% src/dither-positional-float32.c
90
49.03
 -1.62% src/tosixel.c
94
47.46
 -2.85% src/dither.c

Uncovered Existing Lines

Lines Coverage ∆ File
1
0.0
 0.0% src/dither-positional-8bit.c
1
0.0
 0.0% src/dither-varcoeff-8bit.c
1
0.0
 0.0% src/dither-varcoeff-float32.c
1
49.03
 -1.62% src/tosixel.c
Jobs
ID Job ID Ran Files Coverage
1 19536872933.1 53
40.99
 GitHub Action Run
Source Files on build 19536872933