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Qiskit / qiskit / 18655748002
88%
main: 88%

Build:
Build:
LAST BUILD BRANCH: fix-counts-mixed-width
DEFAULT BRANCH: main
Ran 20 Oct 2025 03:55PM UTC
Jobs 1
Files 867
Run time 2min
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20 Oct 2025 02:17PM UTC coverage: 88.434% (+0.03%) from 88.404%
18655748002

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Fix schedule analysis passes with empty circuits (#15147) (#15216)

Internally the passes look for the time-unit type of the first operation
in the circuit, to dispatch to wall-time or clock-cycle handlers.  This
caused trouble if there _were_ no durations, even though the circuit is
trivially scheduled.

(cherry picked from commit cd49fb74b)

Co-authored-by: Jake Lishman <jake.lishman@ibm.com>

46 of 62 new or added lines in 2 files covered. (74.19%)

2 existing lines in 2 files now uncovered.

92397 of 104481 relevant lines covered (88.43%)

548981.72 hits per line

Uncovered Changes

Lines Coverage ∆ File
15
81.67
0.83% crates/transpiler/src/passes/asap_schedule_analysis.rs
1
97.14
0.71% crates/transpiler/src/passes/alap_schedule_analysis.rs

Coverage Regressions

Lines Coverage ∆ File
1
82.79
0.0% crates/circuit/src/parameter/parameter_expression.rs
1
93.04
1.55% crates/qasm2/src/lex.rs
Jobs
ID Job ID Ran Files Coverage
1 18655748002.1 20 Oct 2025 03:55PM UTC 867
88.43
GitHub Action Run
Source Files on build 18655748002
  • Tree
  • List 867
  • Changed 5
  • Source Changed 2
  • Coverage Changed 5
Coverage ∆ File Lines Relevant Covered Missed Hits/Line
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