Qiskit / qiskit / 18654005688
88%

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Jobs 1
Files 871
Run time 2min
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coverage: 88.264% (+0.004%) from 88.26%
18654005688

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Fix schedule analysis passes with empty circuits (#15147)

Internally the passes look for the time-unit type of the first operation
in the circuit, to dispatch to wall-time or clock-cycle handlers.  This
caused trouble if there _were_ no durations, even though the circuit is
trivially scheduled.

46 of 62 new or added lines in 2 files covered. (74.19%)

10 existing lines in 3 files now uncovered.

93236 of 105633 relevant lines covered (88.26%)

1153385.02 hits per line

New Missed Lines in Diff

Lines Coverage ∆ File
1
97.06
 0.74% crates/transpiler/src/passes/alap_schedule_analysis.rs
15
81.67
 0.83% crates/transpiler/src/passes/asap_schedule_analysis.rs

Uncovered Existing Lines

Lines Coverage ∆ File
1
81.99
 0.0% crates/circuit/src/parameter/parameter_expression.rs
2
72.86
 -0.04% crates/circuit/src/parameter/symbol_expr.rs
7
92.03
 -0.77% crates/qasm2/src/lex.rs
Jobs
ID Job ID Ran Files Coverage
1 18654005688.1 871
88.26
 GitHub Action Run
Source Files on build 18654005688