Qiskit / qiskit / 17810732090

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Commit Message

Preserve registers in output TranspileLayout (#15024) (#15025)

* Preserve registers in output TranspileLayout

In the move of the ApplyLayout pass in Rust one detail of the initial
layout was being lost in the translation from Python Layout ->
Rust TranspileLayout -> Python TranspileLayout the registers tracked in
the initial layout. To address this, a vec of registers is added to the
Rust space `TranspileLayout` struct. This then gets populated when going
from Python -> Rust from the initial layout, and when converting from a
Rust TranspileLayout -> Python TranspileLayout the initial layout field
adds the tracked registers.

Since the bug wasn't included in a full release no release note is
included. It will be tagged for the changelog though to indicate the
difference between 2.2.0rc1 and 2.2.0

Fixes #15014

* Fix cext rust tests too

* Add test for allocated ancilla register too

(cherry picked from commit bb100f83c)

Co-authored-by: Matthew Treinish <mtreinish@kortar.org>

Run Details

62 of 62 new or added lines in 7 files covered. (100.0%)

14 existing lines in 3 files now uncovered.

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