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pybricks / pybricks-micropython / 16608412517
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Build:
DEFAULT BRANCH: master
Ran 29 Jul 2025 10:04PM UTC
Jobs 2
Files 122
Run time 1min
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29 Jul 2025 10:02PM UTC coverage: 56.982% (+0.02%) from 56.967%
16608412517

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dlech
pbio/drv/usb/usb_ev3.c: Defer setting USB_CSRL0_RXRDYC

The SETUPEND bit in the PERI_CSR0 seems to do _exactly_ what it says.
The bit gets set if a control transaction ends (either by receiving
a new SETUP token, or by completing the status phase with an ACK)
before the DATAEND bit is set.

However, clearing RXPKTRDY seems to be the only flag needed before the
MUSB IP moves on to automatically allowing the status phase to complete.
The datasheet hints at this by saying:

> The interval between setting SERV_RXPKTRDY bit and DATAEND bit
> should be very small to avoid getting a SetupEnd error condition.

By setting the bits separately like we were doing before, if the host
controller completed the status phase while we were still running
through the IRQ handler, the USB IP would detect SetupEnd,
we would interpret it as an error, and then we would fail to
act on, in particular, the SET_ADDRESS command. This manifested in
the device suddenly no longer responding to subsequent GET_DESCRIPTORs.

We now set the bits at the exact same time, so this race window is closed.

This race window does not apply to requests with a data stage
due to the extra packets which are expected.

3885 of 6818 relevant lines covered (56.98%)

20619983.13 hits per line

Jobs
ID Job ID Ran Files Coverage
1 PBIO - 16608412517.1 29 Jul 2025 10:06PM UTC 72
61.0
GitHub Action Run
2 virtualhub - 16608412517.2 29 Jul 2025 10:03PM UTC 94
50.08
GitHub Action Run
Source Files on build 16608412517
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