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IntelPython / dpctl / 15733431481
85%
master: 86%

Build:
Build:
LAST BUILD BRANCH: disallow_conv_to_scalar_ndim
DEFAULT BRANCH: master
Ran 18 Jun 2025 01:39PM UTC
Jobs 1
Files 82
Run time 1min
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18 Jun 2025 12:56PM UTC coverage: 84.972% (-0.02%) from 84.989%
15733431481

Pull #2096

github

web-flow
Merge 5bf20fdeb into 35a8c26e8
Pull Request #2096: Enable architecture selection for `DPCTL_TARGET_CUDA`

2967 of 3766 branches covered (78.78%)

Branch coverage included in aggregate %.

12232 of 14121 relevant lines covered (86.62%)

6884.88 hits per line

Uncovered Existing Lines

Lines Coverage ∆ File
1
87.57
-0.54% dpctl/tensor/_stride_utils.pxi
2
86.27
-3.92% dpctl/tensor/_types.pxi
Jobs
ID Job ID Ran Files Coverage
1 15733431481.1 18 Jun 2025 01:39PM UTC 107
76.41
GitHub Action Run
Source Files on build 15733431481
  • Tree
  • List 82
  • Changed 18
  • Source Changed 0
  • Coverage Changed 18
Coverage ∆ File Lines Relevant Covered Missed Hits/Line Branch Hits Branch Misses
  • Back to Repo
  • Pull Request #2096
  • PR Base - master (#15730665458)
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