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IntelPython / dpctl / 15710332448
85%
master: 86%

Build:
Build:
LAST BUILD BRANCH: disallow_conv_to_scalar_ndim
DEFAULT BRANCH: master
Ran 17 Jun 2025 03:22PM UTC
Jobs 1
Files 82
Run time 20min
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17 Jun 2025 02:38PM UTC coverage: 84.989% (+0.01%) from 84.978%
15710332448

Pull #2096

github

web-flow
Merge 2ee05d2ad into 96dbbb90e
Pull Request #2096: Enable architecture selection for `DPCTL_TARGET_CUDA`

2967 of 3766 branches covered (78.78%)

Branch coverage included in aggregate %.

12235 of 14121 relevant lines covered (86.64%)

6883.72 hits per line

Uncovered Existing Lines

Lines Coverage ∆ File
1
88.24
0.0% dpctl/tensor/_types.pxi
Jobs
ID Job ID Ran Files Coverage
1 15710332448.1 17 Jun 2025 03:23PM UTC 107
76.42
GitHub Action Run
Source Files on build 15710332448
  • Tree
  • List 82
  • Changed 19
  • Source Changed 0
  • Coverage Changed 19
Coverage ∆ File Lines Relevant Covered Missed Hits/Line Branch Hits Branch Misses
  • Back to Repo
  • Pull Request #2096
  • PR Base - master (#15686639700)
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