Nic30 / hdlConvertor / #217
60%

DEFAULT BRANCH: master
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Jobs 1
Files 334
Run time 3min
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coverage: 60.029% (+1.1%) from 58.909%
#217

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Merge pull request #201 from Thomasb81/remove_line_in_pp

fix(verilogpp): rm newlines incorrectly added in pp

41595 of 69292 relevant lines covered (60.03%)

1047953.79 hits per line

Uncovered Existing Lines

Lines Coverage ∆ File
5
64.02
 -0.04% build-dbg/vhdlParser.cpp
62
67.68
 0.0% build-dbg/verilogPreprocLexer.cpp
Jobs
ID Job ID Ran Files Coverage
1 #217.1 334
60.03
Source Files on build #217