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ARM64: Fix IR_SLOAD assembly.

Reported by Gate88.

(cherry picked from commit 6c4826f12)

The issue is in the case when IR SLOAD is unused on a trace, it persists
only for typecheck, and has the `num` type. In this case, the `dest`
register is `RID_NONE`. Hence, the `fmov` instruction is emitted
unconditionally, where the destination register is `d0` (`RID_NONE &
31`). So, the value of this register is spoiled. If it holds any value
evaluated before and used after this SLOAD, it leads to incorrect
behaviour.

So the emitted assembly for the aforementioned SLOAD looks like the
following:
| ldr   x27, [x7, #24]
| cmp   x0, x27, lsr #32
| bls   0x67d7f4f0    ->0
| fmov  d0, x27           ; this spoils d0

Instead of the following:
| ldr   x27, [x7, #24]
| cmp   x0, x27, lsr #32
| bls   0x6a91f4e8    ->0

This patch adds the check that the register is in use before emitting
the instruction.

Sergey Kaplun:
* added the description and the test for the problem

Part of tarantool/tarantool#11278

5706 of 6042 branches covered (94.44%)

Branch coverage included in aggregate %.

21761 of 23491 relevant lines covered (92.64%)

3833031.42 hits per line