• Home
  • Features
  • Pricing
  • Docs
  • Announcements
  • Sign In

SRI-CSL / yices2 / 15082351134
65%

Build:
DEFAULT BRANCH: master
Ran 17 May 2025 06:15AM UTC
Jobs 1
Files 486
Run time 1min
Badge
Embed ▾
README BADGES
x

If you need to use a raster PNG badge, change the '.svg' to '.png' in the link

Markdown

Textile

RDoc

HTML

Rst

17 May 2025 06:05AM UTC coverage: 65.343%. Remained the same
15082351134

push

github

web-flow
update readme get-model output (#556)

* print_smt2_model: adjust for SMT-LIB syntax

The `model` keyword was adopted by many solvers at some point but was never
part of the SMT-LIB standard. Nowadays, most popular solvers stick more closely
to the standard in this respect and have dropped the "(model [..])" syntax.

More details here:

    https://groups.google.com/g/smt-lib/c/5xpcIxdQ8-A/m/lGGxtApUAgAJ

* update readme

---------

Co-authored-by: Mrmaxmeier <Mrmaxmeier@gmail.com>

81163 of 124211 relevant lines covered (65.34%)

1557111.58 hits per line

Jobs
ID Job ID Ran Files Coverage
1 15082351134.1 17 May 2025 06:15AM UTC 486
65.34
GitHub Action Run
Source Files on build 15082351134
  • Tree
  • List 486
  • Changed 0
  • Source Changed 0
  • Coverage Changed 0
Coverage ∆ File Lines Relevant Covered Missed Hits/Line
  • Back to Repo
  • a4db1e6f on github
  • Prev Build on master (#15082206606)
  • Next Build on master (#15083209318)
STATUS · Troubleshooting · Open an Issue · Sales · Support · CAREERS · ENTERPRISE · START FREE · SCHEDULE DEMO
ANNOUNCEMENTS · TWITTER · TOS & SLA · Supported CI Services · What's a CI service? · Automated Testing

© 2026 Coveralls, Inc