Qiskit / qiskit / 13181611285

88%

Build Type

push

github

Committed by web-flow

Commit Message

Ensure `translation` stage always outputs ISA circuits (#13792)

This shifts the responsibility of the `translation` stage slightly to
always output ISA circuits.  It previously was not 100% required that
they did this, at least implicitly because Qiskit's built-in plugins
didn't always respect 2q direction.

The builtin translation plugins now always respect 2q direction, which
removes the need for the `pre_optimization` implicit stage, freeing it
up for better user customisation.

This (in theory) shouldn't have runtime impacts because the optimisation
loop was already having to do this afterwards anyway.  For potential
plugins that _do_ respect gate direction (like the upcoming
`BasisConstructor`), it can be a speedup in the default pipeline, since
they won't need to run the gate-direction check any more.

Run Details

10 of 10 new or added lines in 1 file covered. (100.0%)

25 existing lines in 5 files now uncovered.

79329 of 89543 relevant lines covered (88.59%)

350771.57 hits per line