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Warning: This build has drifted.
The coverage report for this pull request build may be inaccurate because its base commit is no longer the HEAD of its target branch.
This means it includes changes from outside the original pull request, including, potentially, unrelated coverage changes.

    • Learn more: For more information on this, see Tracking coverage changes for pull request builds.
    • Fix now: For a quick fix, rebase this PR at GitHub. Your next report should be accurate.
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IntelPython / dpctl / 10289732725
88%
master: 86%

Build:
Build:
LAST BUILD BRANCH: disallow_conv_to_scalar_ndim
DEFAULT BRANCH: master
Ran 07 Aug 2024 07:05PM UTC
Jobs 1
Files 79
Run time 1min
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07 Aug 2024 06:27PM UTC coverage: 87.93%. Remained the same
10289732725

Pull #1792

github

web-flow
Merge 7f9ab84b0 into 1a789e715
Pull Request #1792: Fix for gh 1785

3450 of 3959 branches covered (87.14%)

Branch coverage included in aggregate %.

3 of 4 new or added lines in 1 file covered. (75.0%)

11463 of 13001 relevant lines covered (88.17%)

7126.02 hits per line

New Missed Lines in Diff

Lines Coverage ∆ File
1
87.0
0.06% dpctl/tensor/_slicing.pxi
Jobs
ID Job ID Ran Files Coverage
1 10289732725.1 07 Aug 2024 07:06PM UTC 103
79.64
GitHub Action Run
Source Files on build 10289732725
  • Tree
  • List 79
  • Changed 23
  • Source Changed 0
  • Coverage Changed 16
Coverage ∆ File Lines Relevant Covered Missed Hits/Line Branch Hits Branch Misses
  • Back to Repo
  • Pull Request #1792
  • PR Base - master (#10287926947)
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