7399670798
64%

Ran 03 Jan 2024 04:27PM UTC

Jobs 1

Files 143

Run time 13s

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Committed 03 Jan 2024 04:14PM UTC coverage: 65.194% (-1.7%) from 66.936%

Build # 7399670798

Build Type

push

github

Committed by

web-flow

Commit Message

[Feature]: samples:cxl_hello_fpga : Add support for Hello fpga feature for CMC (#3052)

* samples:cxl_hello_fpga:Add hello fpga support for CMC

samples/CMakeLists.txt: Added cxl_hello_fpga module for compilation
samples:cxl_hello_fpga: Added this folder  updates pertaining to Hello FPGA feature for CMC

Signed-off-by: Lakshmiravikanth Pammi <lakshmiravikanth.pammi@intel.com>

* samples:cxl_hello_fpga : Add support for Hello fpga feature for CMC

Problem/Feature: 1. A new feature, hello fpga, is introduced for CMC
                 2. CL bytes format is changed by RTL team

Fix/Workaround: 1. Updates pertaining to hello fpga feature are newly added
                2. Driver is updated as per the change in CL integrity check
                format.

Changes made: New folder named as cxl_hello_fpga along with required files are
              introduced for supporting hello_fpga feature

              1.Review comments shared by Ananda are added.
              2.Clang-format is applied for all source files available
                in cxl_hello_fpga as suggested by Gerlach, Matthew.
              3.Integrity check API is updated as per the new CL format
                introduced by RTL team

Signed-off-by: Lakshmiravikanth Pammi <lakshmiravikanth.pammi@intel.com>

---------

Signed-off-by: Lakshmiravikanth Pammi <lakshmiravikanth.pammi@intel.com>
Co-authored-by: Ananda Ravuri <33236856+anandaravuri@users.noreply.github.com>

Run Details

15756 of 24168 relevant lines covered (65.19%)

9024.7 hits per line

Jobs

ID	Job ID	Ran	Files	Coverage
1	7399670798.1	03 Jan 2024 04:27PM UTC	143	65.19	GitHub Action Run

OFS / opae-sdk / 7399670798
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