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SRI-CSL / yices2 / 6277412324
65%

Build:
DEFAULT BRANCH: master
Ran 22 Sep 2023 05:50PM UTC
Jobs 1
Files 471
Run time 45s
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22 Sep 2023 05:41PM UTC coverage: 64.973% (-0.01%) from 64.983%
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MC-SAT Thread Safety (#456)

* Correct debug code.

* Avoid deadlocks in MC-SAT.

---------

Co-authored-by: Mark Mitchell <mark.mitchell@sri.com>

26 of 26 new or added lines in 7 files covered. (100.0%)

78998 of 121585 relevant lines covered (64.97%)

1324987.66 hits per line

New Missed Lines in Diff

Lines Coverage ∆ File
2
61.19
0.0% src/mcsat/bv/bv_explainer.c
2
89.15
0.0% src/mcsat/preprocessor.c
3
64.39
0.0% src/mcsat/conflict.c
4
26.48
-0.23% src/api/yices_api.c

Uncovered Existing Lines

Lines Coverage ∆ File
1
89.15
0.0% src/mcsat/preprocessor.c
8
26.48
-0.23% src/api/yices_api.c
Jobs
ID Job ID Ran Files Coverage
1 6277412324.1 22 Sep 2023 05:50PM UTC 1615
65.58
GitHub Action Run
Source Files on build 6277412324
  • Tree
  • List 471
  • Changed 135
  • Source Changed 0
  • Coverage Changed 113
Coverage ∆ File Lines Relevant Covered Missed Hits/Line
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