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MIPS: Add MIPS64 R6 port.

Contributed by Hua Zhang, YunQiang Su from Wave Computing,
and Radovan Birdic from RT-RK.
Sponsored by Wave Computing.

(cherry-picked from commit 94d0b5300)

This patch adds support for MIPS Release 6 [1] for the 64-bit build.
This includes:
* Global `_map_def` value is set with <dynasm/dynasm.lua>. `MIPSR6` key
  specifies the corresponding instruction set support. Also, `MIPSR6` is
  defined in `DYNASM_FLAGS` (`DASM_AFLAGS`).
* New instructions are added within <dynasm/dasm_mips.lua>, they are
  used if the aforementioned key is set.
* Obsolete instructions (that are no longer in use in r6) are used in
  the opposite case (if `MIPSR6` isn't set).
* New opcode maps are added to <src/jit/dis_mips.lua>.
* `map_arch` table in <jit/bcsave.lua> is refactored for more convenient
  usage. Now each arch key contains a table with the corresponding info
  about the supported architecture:
    - `e`: endianness "le" or "be"
    - `b`: bit-width of the supported architecture; 32 or 64
    - `m`: machine specification (see `e_machine` in man elf)
    - `f`: processor-specific flags (see `e_flags` in man elf)
    - `p`: number that identifies the type of target machine [2] for
      Portable Executable format [3].
* New `LJ_TARGET_MIPSR6` define is set for MIPSR6 in <src/lj_arch.h>.
* The corresponding "MIPS32R6", "MIPS64R6" CPU strings are added to the
  <src/jit.h>
* MIPSR6 instructions are added to the <src/lj_target_mips.h>, some
  obsolete instructions are removed or defined only for the non-MIPSR6
  build.
* All release-dependent instructions in <src/lj_asm_mips.h> are
  instrumented with `LJ_TARGET_MIPSR6` macro.
* `f20`, `f21`, `f22` FP registers are defined as `FTMP0`, `FTMP1`,
  `FTMP2` correspondingly in the VM.
* All release-dependent instructions in <src/vm_mips64.dasm> are
  instrumented with `MIPSR6` macro.
* `sfmin_max` macro now takes the third operand for the MIPSR6 build.
* Fix the impli... (continued)

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