Nic30 / hdlConvertor / #195
63%

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Jobs 1
Files 117
Run time 3s
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coverage: 62.515% (+0.08%) from 62.437%
#195

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Merge pull request #176 from AmeyaVS/fix/primitive-verilog-code

Initial Version to fix Verilog Primitive Structural Code(Fixes #173)

66 of 66 new or added lines in 1 file covered. (100.0%)

34190 of 54691 relevant lines covered (62.51%)

15680.91 hits per line

New Missed Lines in Diff

Lines Coverage ∆ File
4
92.56
 1.65% src/svConvertor/gateParser.cpp
Jobs
ID Job ID Ran Files Coverage
1 #195.1 117
62.51
Source Files on build #195