lsils / mockturtle / d9568450f0604f48eefd1de76696223c66ad63e7
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DEFAULT BRANCH: master
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Jobs 1
Files 93
Run time 5s
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d9568450f0604f48eefd1de76696223c66ad63e7

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Access module and I/O names through Verilog reader. (#319)

7567 of 9516 relevant lines covered (79.52%)

94598.96 hits per line

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ID Job ID Ran Files Coverage
1 d9568450f0604f48eefd1de76696223c66ad63e7.1 0
79.52
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Source Files on build d9568450f0604f48eefd1de76696223c66ad63e7
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