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micropython / micropython / 12441
98%

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DEFAULT BRANCH: master
Ran 29 Jan 2020 05:56AM UTC
Jobs 1
Files 270
Run time 22s
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dpgeorge
stm32/powerctrl: For F7, allow PLLM!=HSE when setting PLLSAI to 48MHz.

PLLM is shared among all PLL blocks on F7 MCUs, and this calculation to
configure PLLSAI to have 48MHz on the P output previously assumed that PLLM
is equal to HSE (eg PLLM=25 for HSE=25MHz).  This commit relaxes this
assumption to allow other values of PLLM.

16417 of 16737 relevant lines covered (98.09%)

409605.59 hits per line

Jobs
ID Job ID Ran Files Coverage
3 12441.3 (NAME="unix coverage build and tests") 29 Jan 2020 05:56AM UTC 0
98.09
Travis Job 12441.3
Source Files on build 12441
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