UCI-CARL / CARLsim4 / 157
86%
master: 86%

LAST BUILD BRANCH: fix/performance
DEFAULT BRANCH: master
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Jobs 1
Files 34
Run time 2s
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Made timestep loop the outer loop. Added next voltage & current spike back in. Adjusted the current update to occur once per global state update call. Only one conductance test is still failing: STDP.ISTDPulseCurve_Adv.

343 of 343 new or added lines in 1 file covered. (100.0%)

7352 of 8609 relevant lines covered (85.4%)

1128239.62 hits per line

New Missed Lines in Diff

Lines Coverage ∆ File
24
100.0
 carlsim/kernel/src/snn_cpu_module.cpp
Jobs
ID Job ID Ran Files Coverage
1 157.1 0
85.4
 Travis Job 157.1
Source Files on build 157
Detailed source file information is not available for this build.