UCI-CARL
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CARLsim4
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master: 86%
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feat/benchmarkComp
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feat/benchmarkComp
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carlsim
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carlsim4_testECJ
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compartments_tutorial
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doc/interface
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doc/kernel
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doc/kernelGPU
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doc/userGuide
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feat/Compartments
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feat/NeuronMonitor
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feat/RK4
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feat/benchmark
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feat/benchmarkLIF
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feat/benchmarkRK4
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feat/lif
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feat/lifHeterogeneous
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feat/resumeExamples
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feat/testNoCuda
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feat/winDepGTest
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fix/CleanUp
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fix/NeuronMonitor
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fix/dirNotExist
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fix/mtMemLeak
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fix/multiRuntimes
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fix/multiRuntimesAux
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fix/performance
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fix/summaryPrint
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fix/synIdLimit
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fix/synIdOverflowTest
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mb/targets
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feat/benchmarkComp
- carlsim
- carlsim4_testECJ
- compartments_tutorial
- doc/interface
- doc/kernel
- doc/kernelGPU
- doc/userGuide
- feat/Compartments
- feat/NeuronMonitor
- feat/RK4
- feat/benchmark
- feat/benchmarkLIF
- feat/benchmarkRK4
- feat/lif
- feat/lifHeterogeneous
- feat/resumeExamples
- feat/testNoCuda
- feat/winDepGTest
- fix/CleanUp
- fix/NeuronMonitor
- fix/dirNotExist
- fix/mtMemLeak
- fix/multiRuntimes
- fix/multiRuntimesAux
- fix/performance
- fix/summaryPrint
- fix/synIdLimit
- fix/synIdOverflowTest
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travis-ci
611 of 611 new or added lines in 8 files covered. (100.0%)
7647 of 8910 relevant lines covered (85.82%)
1119009.85 hits per line
Relevant lines Covered
8910
RELEVANT LINES
7647
COVERED LINES
1119009.85
HITS PER LINE
Source Files on feat/benchmarkComp
| Coverage | ∆ | File | Lines | Relevant | Covered | Missed | Hits/Line |
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Recent builds
| Builds | Branch | Commit | Type | Ran | Committer | Via | Coverage |
|---|---|---|---|---|---|---|---|
| 254 | feat/benchmarkComp | Merge branch 'feat/Compartments' of https://github.com/UCI-CARL/CARLsim4 into feat/benchmarkComp | push |  tingshuc |
travis-ci | pending completion |