• Home
  • Features
  • Pricing
  • Docs
  • Announcements
  • Sign In

NVIDIA / nvrc / 20354255911

18 Dec 2025 11:14PM UTC coverage: 28.618% (-4.0%) from 32.588%
20354255911

Pull #83

github

web-flow
Merge d10d69857 into 1bf141c3d
Pull Request #83: Ambush Multiple Agent Code Inspection

71 of 149 new or added lines in 8 files covered. (47.65%)

3 existing lines in 2 files now uncovered.

87 of 304 relevant lines covered (28.62%)

0.61 hits per line

Source File
Press 'n' to go to next uncovered line, 'b' for previous

77.78
/src/kernel_params.rs
1
use anyhow::{Context, Result};
2
use log::{debug, warn};
3
use std::fs;
4

5
use crate::nvrc::NVRC;
6

7
fn parse_boolean(s: &str) -> bool {
1✔
8
    match s.to_ascii_lowercase().as_str() {
2✔
9
        "on" | "true" | "1" | "yes" => true,
1✔
10
        "off" | "false" | "0" | "no" => false,
1✔
11
        _ => {
12
            warn!("unrecognized boolean '{}', defaulting to false", s);
2✔
13
            false
1✔
14
        }
15
    }
16
}
17

18
impl NVRC {
19
    pub fn process_kernel_params(&mut self, cmdline: Option<&str>) -> Result<()> {
1✔
20
        let content = match cmdline {
1✔
21
            Some(c) => c.to_owned(),
1✔
NEW
22
            None => fs::read_to_string("/proc/cmdline").context("read /proc/cmdline")?,
×
23
        };
24

25
        for (k, v) in content.split_whitespace().filter_map(|p| p.split_once('=')) {
4✔
26
            match k {
27
                "nvrc.log" => nvrc_log(v, self)?,
4✔
28
                "nvrc.uvm.persistence.mode" => uvm_persistenced_mode(v, self)?,
2✔
29
                "nvrc.dcgm" => nvrc_dcgm(v, self)?,
4✔
30
                "nvrc.fabricmanager" => nvrc_fabricmanager(v, self)?,
2✔
31
                "nvrc.smi.srs" => nvidia_smi_srs(v, self)?,
2✔
32
                "nvrc.smi.lgc" => nvidia_smi_lgc(v, self)?,
4✔
33
                "nvrc.smi.lmcd" => nvidia_smi_lmcd(v, self)?,
5✔
34
                "nvrc.smi.pl" => nvidia_smi_pl(v, self)?,
2✔
35
                _ => {}
36
            }
37
        }
38
        Ok(())
1✔
39
    }
40
}
41

42
fn nvrc_dcgm(value: &str, ctx: &mut NVRC) -> Result<()> {
1✔
43
    let dcgm = parse_boolean(value);
1✔
44
    ctx.dcgm_enabled = Some(dcgm);
1✔
45
    debug!("nvrc.dcgm: {dcgm}");
2✔
46
    Ok(())
47
}
48

NEW
49
fn nvrc_fabricmanager(value: &str, ctx: &mut NVRC) -> Result<()> {
×
NEW
50
    let fabricmanager = parse_boolean(value);
×
NEW
51
    ctx.fabricmanager_enabled = Some(fabricmanager);
×
NEW
52
    debug!("nvrc.fabricmanager: {fabricmanager}");
×
53
    Ok(())
54
}
55

56
fn nvrc_log(value: &str, _ctx: &mut NVRC) -> Result<()> {
1✔
57
    let lvl = match value.to_ascii_lowercase().as_str() {
2✔
58
        "off" | "0" | "" => log::LevelFilter::Off,
1✔
59
        "error" => log::LevelFilter::Error,
1✔
60
        "warn" => log::LevelFilter::Warn,
2✔
61
        "info" => log::LevelFilter::Info,
3✔
62
        "debug" => log::LevelFilter::Debug,
3✔
NEW
63
        "trace" => log::LevelFilter::Trace,
×
NEW
64
        _ => log::LevelFilter::Off,
×
65
    };
66

67
    log::set_max_level(lvl);
1✔
68
    debug!("nvrc.log: {}", log::max_level());
2✔
69
    fs::write("/proc/sys/kernel/printk_devkmsg", b"on\n").context("printk_devkmsg")?;
1✔
70

71
    Ok(())
1✔
72
}
73

NEW
74
fn nvidia_smi_srs(value: &str, ctx: &mut NVRC) -> Result<()> {
×
NEW
75
    ctx.nvidia_smi_srs = Some(value.to_owned());
×
NEW
76
    debug!("nvidia_smi_srs: {value}");
×
77
    Ok(())
78
}
79

80
fn nvidia_smi_lgc(value: &str, ctx: &mut NVRC) -> Result<()> {
1✔
81
    let mhz: u32 = value.parse().context("nvrc.smi.lgc: invalid frequency")?;
1✔
82
    debug!("nvrc.smi.lgc: {} MHz (all GPUs)", mhz);
2✔
83
    ctx.nvidia_smi_lgc = Some(mhz);
1✔
84
    Ok(())
1✔
85
}
86

87
fn nvidia_smi_lmcd(value: &str, ctx: &mut NVRC) -> Result<()> {
1✔
88
    let mhz: u32 = value.parse().context("nvrc.smi.lmcd: invalid frequency")?;
1✔
89
    debug!("nvrc.smi.lmcd: {} MHz (all GPUs)", mhz);
2✔
90
    ctx.nvidia_smi_lmcd = Some(mhz);
1✔
91
    Ok(())
1✔
92
}
93

94
fn nvidia_smi_pl(value: &str, ctx: &mut NVRC) -> Result<()> {
1✔
95
    let watts: u32 = value.parse().context("nvrc.smi.pl: invalid wattage")?;
1✔
96
    debug!("nvrc.smi.pl: {} W (all GPUs)", watts);
2✔
97
    ctx.nvidia_smi_pl = Some(watts);
1✔
98
    Ok(())
1✔
99
}
100

NEW
101
fn uvm_persistenced_mode(value: &str, ctx: &mut NVRC) -> Result<()> {
×
NEW
102
    let enabled = parse_boolean(value);
×
NEW
103
    ctx.uvm_persistence_mode = Some(enabled);
×
NEW
104
    debug!("nvrc.uvm.persistence.mode: {enabled}");
×
105
    Ok(())
106
}
107

108
#[cfg(test)]
109
mod tests {
110
    use super::*;
111
    use nix::unistd::Uid;
112
    use serial_test::serial;
113
    use std::env;
114
    use std::process::Command;
115
    use std::sync::{LazyLock, Once};
116

117
    static LOG: LazyLock<Once> = LazyLock::new(Once::new);
118

119
    fn log_setup() {
120
        LOG.call_once(|| {
121
            kernlog::init().unwrap();
122
        });
123
    }
124

125
    fn rerun_with_sudo() {
126
        let args: Vec<String> = env::args().collect();
127
        let output = Command::new("sudo").args(&args).status();
128

129
        match output {
130
            Ok(o) => {
131
                if o.success() {
132
                    println!("running with sudo")
133
                } else {
134
                    panic!("not running with sudo")
135
                }
136
            }
137
            Err(e) => {
138
                panic!("Failed to escalate privileges: {e:?}")
139
            }
140
        }
141
    }
142

143
    #[test]
144
    #[serial]
145
    fn test_nvrc_log_debug() {
146
        if !Uid::effective().is_root() {
147
            return rerun_with_sudo();
148
        }
149

150
        log_setup();
151
        let mut c = NVRC::default();
152

153
        nvrc_log("debug", &mut c).unwrap();
154
        assert!(log_enabled!(log::Level::Debug));
155
    }
156

157
    #[test]
158
    #[serial]
159
    fn test_process_kernel_params_nvrc_log_debug() {
160
        if !Uid::effective().is_root() {
161
            return rerun_with_sudo();
162
        }
163

164
        log_setup();
165
        let mut init = NVRC::default();
166

167
        init.process_kernel_params(Some(
168
            "nvidia.smi.lgc=1500 nvrc.log=debug nvidia.smi.lgc=1500",
169
        ))
170
        .unwrap();
171

172
        assert_eq!(log::max_level(), log::LevelFilter::Debug);
173
        assert!(!log_enabled!(log::Level::Trace));
174
    }
175

176
    #[test]
177
    #[serial]
178
    fn test_process_kernel_params_nvrc_log_info() {
179
        if !Uid::effective().is_root() {
180
            return rerun_with_sudo();
181
        }
182

183
        log_setup();
184
        let mut init = NVRC::default();
185

186
        init.process_kernel_params(Some(
187
            "nvidia.smi.lgc=1500 nvrc.log=info nvidia.smi.lgc=1500",
188
        ))
189
        .unwrap();
190

191
        assert_eq!(log::max_level(), log::LevelFilter::Info);
192
        assert!(!log_enabled!(log::Level::Debug));
193
    }
194

195
    #[test]
196
    #[serial]
197
    fn test_process_kernel_params_nvrc_log_0() {
198
        if !Uid::effective().is_root() {
199
            return rerun_with_sudo();
200
        }
201

202
        log_setup();
203
        let mut init = NVRC::default();
204

205
        init.process_kernel_params(Some("nvidia.smi.lgc=1500 nvrc.log=0 nvidia.smi.lgc=1500"))
206
            .unwrap();
207
        assert_eq!(log::max_level(), log::LevelFilter::Off);
208
    }
209

210
    #[test]
211
    #[serial]
212
    fn test_process_kernel_params_nvrc_log_none() {
213
        if !Uid::effective().is_root() {
214
            return rerun_with_sudo();
215
        }
216

217
        log_setup();
218
        let mut init = NVRC::default();
219

220
        init.process_kernel_params(Some("nvidia.smi.lgc=1500 nvrc.log= "))
221
            .unwrap();
222
        assert_eq!(log::max_level(), log::LevelFilter::Off);
223
    }
224

225
    #[test]
226
    fn test_nvrc_dcgm_parameter_handling() {
227
        let mut c = NVRC::default();
228

229
        // Test various "on" values
230
        nvrc_dcgm("on", &mut c).unwrap();
231
        assert_eq!(c.dcgm_enabled, Some(true));
232

233
        nvrc_dcgm("true", &mut c).unwrap();
234
        assert_eq!(c.dcgm_enabled, Some(true));
235

236
        nvrc_dcgm("1", &mut c).unwrap();
237
        assert_eq!(c.dcgm_enabled, Some(true));
238

239
        nvrc_dcgm("yes", &mut c).unwrap();
240
        assert_eq!(c.dcgm_enabled, Some(true));
241

242
        // Test "off" values
243
        nvrc_dcgm("off", &mut c).unwrap();
244
        assert_eq!(c.dcgm_enabled, Some(false));
245

246
        nvrc_dcgm("false", &mut c).unwrap();
247
        assert_eq!(c.dcgm_enabled, Some(false));
248

249
        nvrc_dcgm("invalid", &mut c).unwrap();
250
        assert_eq!(c.dcgm_enabled, Some(false));
251
    }
252

253
    #[test]
254
    fn test_parse_boolean() {
255
        assert!(parse_boolean("on"));
256
        assert!(parse_boolean("true"));
257
        assert!(parse_boolean("1"));
258
        assert!(parse_boolean("yes"));
259
        assert!(parse_boolean("ON"));
260
        assert!(parse_boolean("True"));
261
        assert!(parse_boolean("YES"));
262

263
        assert!(!parse_boolean("off"));
264
        assert!(!parse_boolean("false"));
265
        assert!(!parse_boolean("0"));
266
        assert!(!parse_boolean("no"));
267
        assert!(!parse_boolean("invalid"));
268
        assert!(!parse_boolean(""));
269
    }
270

271
    #[test]
272
    fn test_nvidia_smi_lgc() {
273
        let mut c = NVRC::default();
274

275
        nvidia_smi_lgc("1500", &mut c).unwrap();
276
        assert_eq!(c.nvidia_smi_lgc, Some(1500));
277

278
        nvidia_smi_lgc("2100", &mut c).unwrap();
279
        assert_eq!(c.nvidia_smi_lgc, Some(2100));
280

281
        // Invalid value should error
282
        assert!(nvidia_smi_lgc("invalid", &mut c).is_err());
283
    }
284

285
    #[test]
286
    fn test_nvidia_smi_lmcd() {
287
        let mut c = NVRC::default();
288

289
        nvidia_smi_lmcd("5001", &mut c).unwrap();
290
        assert_eq!(c.nvidia_smi_lmcd, Some(5001));
291

292
        nvidia_smi_lmcd("6000", &mut c).unwrap();
293
        assert_eq!(c.nvidia_smi_lmcd, Some(6000));
294

295
        // Invalid value should error
296
        assert!(nvidia_smi_lmcd("not_a_number", &mut c).is_err());
297
    }
298

299
    #[test]
300
    fn test_nvidia_smi_pl() {
301
        let mut c = NVRC::default();
302

303
        nvidia_smi_pl("300", &mut c).unwrap();
304
        assert_eq!(c.nvidia_smi_pl, Some(300));
305

306
        nvidia_smi_pl("450", &mut c).unwrap();
307
        assert_eq!(c.nvidia_smi_pl, Some(450));
308

309
        // Invalid value should error
310
        assert!(nvidia_smi_pl("abc", &mut c).is_err());
311
    }
312

313
    #[test]
314
    fn test_process_kernel_params_gpu_settings() {
315
        let mut c = NVRC::default();
316

317
        c.process_kernel_params(Some("nvrc.smi.lgc=1500 nvrc.smi.lmcd=5001 nvrc.smi.pl=300"))
318
            .unwrap();
319

320
        assert_eq!(c.nvidia_smi_lgc, Some(1500));
321
        assert_eq!(c.nvidia_smi_lmcd, Some(5001));
322
        assert_eq!(c.nvidia_smi_pl, Some(300));
323
    }
324

325
    #[test]
326
    fn test_process_kernel_params_combined() {
327
        let mut c = NVRC::default();
328

329
        c.process_kernel_params(Some(
330
            "nvrc.smi.lgc=2100 nvrc.uvm.options=opt1=1,opt2=2 nvrc.dcgm=on nvrc.smi.pl=400",
331
        ))
332
        .unwrap();
333

334
        assert_eq!(c.nvidia_smi_lgc, Some(2100));
335
        assert_eq!(c.nvidia_smi_pl, Some(400));
336
        assert_eq!(c.dcgm_enabled, Some(true));
337
    }
338
}
STATUS · Troubleshooting · Open an Issue · Sales · Support · CAREERS · ENTERPRISE · START FREE · SCHEDULE DEMO
ANNOUNCEMENTS · TWITTER · TOS & SLA · Supported CI Services · What's a CI service? · Automated Testing

© 2025 Coveralls, Inc