dc36bab9-d75e-4656-9d36-01f938219dcc

Committed 18 Mar 2024 01:22PM UTC coverage: 87.562% (-0.04%) from 87.598%

Build # dc36bab9-d75e-4656-9d36-01f938219dcc

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Nic30

Commit Message

refactor(operaorDefs): rm duplicated CMP_OP_SWAP

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76.37

/hwt/hdl/types/bitValFunctions.py

from typing import Callable, Union

from hwt.doc_markers import internal
from hwt.hdl.operator import Operator
from hwt.hdl.operatorDefs import AllOps, OpDefinition, CMP_OP_SWAP
from hwt.hdl.types.bits import Bits
from hwt.hdl.types.defs import BOOL
from hwt.hdl.types.typeCast import toHVal
from hwt.hdl.value import HValue
from hwt.synthesizer.rtlLevel.mainBases import RtlSignalBase
from hwt.synthesizer.rtlLevel.signalUtils.exceptions import SignalDriverErr
from pyMathBitPrecise.bit_utils import mask
from pyMathBitPrecise.bits3t import bitsCmp__val, bitsBitOp__val, \
    bitsArithOp__val


@internal
def bitsCmp_detect_useless_cmp(op0, op1, op):
    v = int(op1)
    width = op1._dtype.bit_length()
    if op0._dtype.signed:
        min_val = -1 if width == 1 else -mask(width - 1) - 1
        max_val = 0 if width == 1 else mask(width - 1)
    else:
        min_val = 0
        max_val = mask(width)

    if v == min_val:
        # value can not be lower than min_val
        if op == AllOps.GE:
            # -> always True
            return BOOL.from_py(1, 1)
        elif op == AllOps.LT:
            # -> always False
            return BOOL.from_py(0, 1)
        elif op == AllOps.LE:
            # convert <= to == to highlight the real function
            return AllOps.EQ
    elif v == max_val:
        # value can not be greater than max_val
        if op == AllOps.GT:
            # always False
            return BOOL.from_py(0, 1)
        elif op == AllOps.LE:
            # always True
            return BOOL.from_py(1, 1)
        elif op == AllOps.GE:
            # because value can not be greater than max
            return AllOps.EQ

AnyHValue = Union[HValue, RtlSignalBase]

@internal
def bitsCmp(self: AnyHValue, other: AnyHValue,
            op: OpDefinition,
            selfReduceVal: HValue,
            evalFn:Callable[[AnyHValue, AnyHValue], AnyHValue]=None):
    """
    Apply a generic comparison binary operator

    :attention: If other is Bool signal convert this to bool (not ideal,
        due VHDL event operator)
    :ivar self: operand 0
    :ivar other: operand 1
    :ivar op: operator used
    :ivar selfReduceVal: the value which is a result if operands are all same signal (e.g. a==a = 1, b<b=0)
    :ivar evalFn: override of a python operator function (by default one from "op" is used)
    """
    t = self._dtype
    other = toHVal(other, t)
    ot = other._dtype
    if not isinstance(ot, t.__class__):
        raise TypeError(ot)

    if evalFn is None:
        evalFn = op._evalFn

    iamVal = isinstance(self, HValue)
    otherIsVal = isinstance(other, HValue)
    type_compatible = False
    if ot == BOOL:
        self = self._auto_cast(BOOL)
        type_compatible = True
    elif t == ot:
        type_compatible = True
    # lock type width/signed to other type with
    elif not ot.strict_width or not ot.strict_sign:
        type_compatible = True
        other = other._auto_cast(t)
    elif not t.strict_width or not t.strict_sign:
        type_compatible = True
        other = other._auto_cast(ot)

    if iamVal and otherIsVal:
        if type_compatible:
            return bitsCmp__val(self, other, evalFn)
    else:
        if type_compatible:
            # try to reduce useless cmp
            res = None
            if otherIsVal and other._is_full_valid():
                res = bitsCmp_detect_useless_cmp(self, other, op)
            elif iamVal and self._is_full_valid():
                res = bitsCmp_detect_useless_cmp(other, self, CMP_OP_SWAP[op])

            if res is None:
                pass
            elif isinstance(res, HValue):
                return res
            else:
                assert res == AllOps.EQ, res
                op = res

            if self is other:
                return selfReduceVal
            else:
                return Operator.withRes(op, [self, other], BOOL)

        elif t.signed != ot.signed:
            if t.signed is None:
                self = self._convSign(ot.signed)
                return bitsCmp(self, other, op, evalFn)
            elif ot.signed is None:
                other = other._convSign(t.signed)
                return bitsCmp(self, other, op, evalFn)
        elif t.force_vector != ot.force_vector:
            if t.force_vector:
                self = self[0]
            else:
                other = other[0]
            return bitsCmp(self, other, op, evalFn)

    raise TypeError(f"Values of types (", self._dtype, other._dtype, ") are not comparable")


@internal
def extractNegation(sig: RtlSignalBase):
    """
    :return: tuple(the signal without negation, True if signal was negated)
    """
    try:
        d = sig.singleDriver()
    except SignalDriverErr:
        return (sig, False)
    
    if isinstance(d, Operator) and d.operator == AllOps.NOT:
        return d.operands[0], True
    return sig, False


@internal
def bitsBitOp(self: Union[RtlSignalBase, HValue], other,
              op: OpDefinition,
              getVldFn: Callable[[HValue, HValue], int],
              reduceValCheckFn: Callable[[RtlSignalBase, HValue], bool],
              reduceSigCheckFn: Callable[[RtlSignalBase,  # op0Original
                                          bool,  # op0Negated
                                          bool  # op1Negated
                                          ], Union[RtlSignalBase, HValue]]):
    """
    Apply a generic bitwise binary operator

    :attention: If other is Bool signal, convert this to bool
        (not ideal, due VHDL event operator)
    :ivar self: operand 0
    :ivar other: operand 1
    :ivar op: operator used
    :ivar getVldFn: function to resolve invalid (X) states
    :ivar reduceValCheckFn: function to reduce useless operators (partially evaluate the expression if possible)
    :ivar reduceSigCheckFn: function to reduce useless operators for signals and its negation flags
        (e.g. a&a = a, a&~a=0, b^b=0)
        function parameters are in format (op0Original:RtlSignalBase, op0Negated: bool, op1Negated:bool) -> Union[RtlSignalBase, HValue]:
        returns result signal if reduction is possible else None
    """
    other = toHVal(other, self._dtype)

    iamVal = isinstance(self, HValue)
    otherIsVal = isinstance(other, HValue)

    if iamVal and otherIsVal:
        other = other._auto_cast(self._dtype)
        return bitsBitOp__val(self, other, op._evalFn, getVldFn)
    else:
        s_t = self._dtype
        o_t = other._dtype
        if not isinstance(o_t, s_t.__class__):
            raise TypeError(o_t)

        if s_t == o_t:
            pass
        elif o_t == BOOL and s_t != BOOL:
            self = self._auto_cast(BOOL)
            return op._evalFn(self, other)
        elif o_t != BOOL and s_t == BOOL:
            other = other._auto_cast(BOOL)
            return op._evalFn(self, other)
        else:
            if s_t.signed is not o_t.signed and bool(s_t.signed) == bool(o_t.signed):
                # automatically cast unsigned to vector
                if s_t.signed == False and o_t.signed is None:
                    self = self._vec()
                    s_t = self._dtype
                elif s_t.signed is None and o_t.signed == False:
                    other = other._vec()
                    o_t = other._dtype
                else:
                    raise ValueError("Invalid value for signed flag of type", s_t.signed, o_t.signed, s_t, o_t)

            if s_t == o_t:
                # due to previsous cast the type may become the same
                pass
            elif s_t.bit_length() == 1 and o_t.bit_length() == 1\
                    and s_t.signed is o_t.signed \
                    and s_t.force_vector != o_t.force_vector:
                # automatically cast to vector with a single item to a single bit
                if s_t.force_vector:
                    self = self[0]
                else:
                    other = other[0]

            else:
                raise TypeError("Can not apply operator %r (%r, %r)" % 
                                (op, self._dtype, other._dtype))

        if otherIsVal:
            r = reduceValCheckFn(self, other)
            if r is not None:
                return r

        elif iamVal:
            r = reduceValCheckFn(other, self)
            if r is not None:
                return r

        else:
            _self, _self_n = extractNegation(self)
            _other, _other_n = extractNegation(other)
            if _self is _other:
                return reduceSigCheckFn(self, _self_n, _other_n)

        return Operator.withRes(op, [self, other], self._dtype)


@internal
def bitsArithOp(self, other, op):
    other = toHVal(other, self._dtype)
    if not isinstance(other._dtype, Bits):
        raise TypeError(other._dtype)

    self_is_val = isinstance(self, HValue)
    other_is_val = isinstance(other, HValue)

    if self_is_val and other_is_val:
        return bitsArithOp__val(self, other, op._evalFn)
    else:
        if self._dtype.signed is None:
            self = self._unsigned()

        if op in (AllOps.ADD, AllOps.SUB) and other_is_val and other._is_full_valid() and int(other) == 0:
            return self

        resT = self._dtype
        if op == AllOps.ADD and self_is_val and self._is_full_valid() and int(self) == 0:
            return other._auto_cast(resT)

        if isinstance(other._dtype, Bits):
            t0 = self._dtype
            t1 = other._dtype
            if t0.bit_length() != t1.bit_length():
                if not t1.strict_width:
                    # resize to type of this
                    other = other._auto_cast(t1)
                    t1 = other._dtype
                    pass
                elif not t0.strict_width:
                    # resize self to type of result
                    self = self._auto_cast(t0)
                    t0 = self._dtype
                    pass
                else:
                    raise TypeError("%r %r %r" % (self, op, other))

            if t1.signed != resT.signed:
                other = other._convSign(t0.signed)
        else:
            raise TypeError("%r %r %r" % (self, op, other))

        o = Operator.withRes(op, [self, other], self._dtype)
        return o._auto_cast(resT)

1	from typing import Callable, Union	1✔
2
3	from hwt.doc_markers import internal	1✔
4	from hwt.hdl.operator import Operator	1✔
5	from hwt.hdl.operatorDefs import AllOps, OpDefinition, CMP_OP_SWAP	1✔
6	from hwt.hdl.types.bits import Bits	1✔
7	from hwt.hdl.types.defs import BOOL	1✔
8	from hwt.hdl.types.typeCast import toHVal	1✔
9	from hwt.hdl.value import HValue	1✔
10	from hwt.synthesizer.rtlLevel.mainBases import RtlSignalBase	1✔
11	from hwt.synthesizer.rtlLevel.signalUtils.exceptions import SignalDriverErr	1✔
12	from pyMathBitPrecise.bit_utils import mask	1✔
13	from pyMathBitPrecise.bits3t import bitsCmp__val, bitsBitOp__val, \	1✔
14	bitsArithOp__val
15
16
17	@internal	1✔
18	def bitsCmp_detect_useless_cmp(op0, op1, op):	1✔
19	v = int(op1)	1✔
20	width = op1._dtype.bit_length()	1✔
21	if op0._dtype.signed:	1✔
22	min_val = -1 if width == 1 else -mask(width - 1) - 1	1✔
23	max_val = 0 if width == 1 else mask(width - 1)	1✔
24	else:
25	min_val = 0	1✔
26	max_val = mask(width)	1✔
27
28	if v == min_val:	1✔
29	# value can not be lower than min_val
30	if op == AllOps.GE:	1!
31	# -> always True
UNCOV 32	return BOOL.from_py(1, 1)	×
33	elif op == AllOps.LT:	1!
34	# -> always False
UNCOV 35	return BOOL.from_py(0, 1)	×
36	elif op == AllOps.LE:	1!
37	# convert <= to == to highlight the real function
UNCOV 38	return AllOps.EQ	×
39	elif v == max_val:	1✔
40	# value can not be greater than max_val
41	if op == AllOps.GT:	1!
42	# always False
UNCOV 43	return BOOL.from_py(0, 1)	×
44	elif op == AllOps.LE:	1!
45	# always True
UNCOV 46	return BOOL.from_py(1, 1)	×
47	elif op == AllOps.GE:	1!
48	# because value can not be greater than max
UNCOV 49	return AllOps.EQ	×
50
51	AnyHValue = Union[HValue, RtlSignalBase]	1✔
52
53	@internal	1✔
54	def bitsCmp(self: AnyHValue, other: AnyHValue,	1✔
55	op: OpDefinition,
56	selfReduceVal: HValue,
57	evalFn:Callable[[AnyHValue, AnyHValue], AnyHValue]=None):
58	"""
59	Apply a generic comparison binary operator
60
61	:attention: If other is Bool signal convert this to bool (not ideal,
62	due VHDL event operator)
63	:ivar self: operand 0
64	:ivar other: operand 1
65	:ivar op: operator used
66	:ivar selfReduceVal: the value which is a result if operands are all same signal (e.g. a==a = 1, b<b=0)
67	:ivar evalFn: override of a python operator function (by default one from "op" is used)
68	"""
69	t = self._dtype	1✔
70	other = toHVal(other, t)	1✔
71	ot = other._dtype	1✔
72	if not isinstance(ot, t.__class__):	1!
UNCOV 73	raise TypeError(ot)	×
74
75	if evalFn is None:	1✔
76	evalFn = op._evalFn	1✔
77
78	iamVal = isinstance(self, HValue)	1✔
79	otherIsVal = isinstance(other, HValue)	1✔
80	type_compatible = False	1✔
81	if ot == BOOL:	1✔
82	self = self._auto_cast(BOOL)	1✔
83	type_compatible = True	1✔
84	elif t == ot:	1✔
85	type_compatible = True	1✔
86	# lock type width/signed to other type with
87	elif not ot.strict_width or not ot.strict_sign:	1✔
88	type_compatible = True	1✔
89	other = other._auto_cast(t)	1✔
90	elif not t.strict_width or not t.strict_sign:	1!
UNCOV 91	type_compatible = True	×
UNCOV 92	other = other._auto_cast(ot)	×
93
94	if iamVal and otherIsVal:	1✔
95	if type_compatible:	1!
96	return bitsCmp__val(self, other, evalFn)	1✔
97	else:
98	if type_compatible:	1✔
99	# try to reduce useless cmp
100	res = None	1✔
101	if otherIsVal and other._is_full_valid():	1✔
102	res = bitsCmp_detect_useless_cmp(self, other, op)	1✔
103	elif iamVal and self._is_full_valid():	1✔
104	res = bitsCmp_detect_useless_cmp(other, self, CMP_OP_SWAP[op])	1✔
105
106	if res is None:	1!
107	pass	1✔
UNCOV 108	elif isinstance(res, HValue):	×
UNCOV 109	return res	×
110	else:
UNCOV 111	assert res == AllOps.EQ, res	×
UNCOV 112	op = res	×
113
114	if self is other:	1✔
115	return selfReduceVal	1✔
116	else:
117	return Operator.withRes(op, [self, other], BOOL)	1✔
118
119	elif t.signed != ot.signed:	1!
120	if t.signed is None:	1!
121	self = self._convSign(ot.signed)	1✔
122	return bitsCmp(self, other, op, evalFn)	1✔
123	elif ot.signed is None:	×
UNCOV 124	other = other._convSign(t.signed)	×
125	return bitsCmp(self, other, op, evalFn)	×
126	elif t.force_vector != ot.force_vector:	×
UNCOV 127	if t.force_vector:	×
128	self = self[0]	×
129	else:
UNCOV 130	other = other[0]	×
UNCOV 131	return bitsCmp(self, other, op, evalFn)	×
132
UNCOV 133	raise TypeError(f"Values of types (", self._dtype, other._dtype, ") are not comparable")	×
134
135
136	@internal	1✔
137	def extractNegation(sig: RtlSignalBase):	1✔
138	"""
139	:return: tuple(the signal without negation, True if signal was negated)
140	"""
141	try:	1✔
142	d = sig.singleDriver()	1✔
143	except SignalDriverErr:	1✔
144	return (sig, False)	1✔
145
146	if isinstance(d, Operator) and d.operator == AllOps.NOT:	1✔
147	return d.operands[0], True	1✔
148	return sig, False	1✔
149
150
151	@internal	1✔
152	def bitsBitOp(self: Union[RtlSignalBase, HValue], other,	1✔
153	op: OpDefinition,
154	getVldFn: Callable[[HValue, HValue], int],
155	reduceValCheckFn: Callable[[RtlSignalBase, HValue], bool],
156	reduceSigCheckFn: Callable[[RtlSignalBase, # op0Original
157	bool, # op0Negated
158	bool # op1Negated
159	], Union[RtlSignalBase, HValue]]):
160	"""
161	Apply a generic bitwise binary operator
162
163	:attention: If other is Bool signal, convert this to bool
164	(not ideal, due VHDL event operator)
165	:ivar self: operand 0
166	:ivar other: operand 1
167	:ivar op: operator used
168	:ivar getVldFn: function to resolve invalid (X) states
169	:ivar reduceValCheckFn: function to reduce useless operators (partially evaluate the expression if possible)
170	:ivar reduceSigCheckFn: function to reduce useless operators for signals and its negation flags
171	(e.g. a&a = a, a&~a=0, b^b=0)
172	function parameters are in format (op0Original:RtlSignalBase, op0Negated: bool, op1Negated:bool) -> Union[RtlSignalBase, HValue]:
173	returns result signal if reduction is possible else None
174	"""
175	other = toHVal(other, self._dtype)	1✔
176
177	iamVal = isinstance(self, HValue)	1✔
178	otherIsVal = isinstance(other, HValue)	1✔
179
180	if iamVal and otherIsVal:	1✔
181	other = other._auto_cast(self._dtype)	1✔
182	return bitsBitOp__val(self, other, op._evalFn, getVldFn)	1✔
183	else:
184	s_t = self._dtype	1✔
185	o_t = other._dtype	1✔
186	if not isinstance(o_t, s_t.__class__):	1!
UNCOV 187	raise TypeError(o_t)	×
188
189	if s_t == o_t:	1✔
190	pass	1✔
191	elif o_t == BOOL and s_t != BOOL:	1✔
192	self = self._auto_cast(BOOL)	1✔
193	return op._evalFn(self, other)	1✔
194	elif o_t != BOOL and s_t == BOOL:	1✔
195	other = other._auto_cast(BOOL)	1✔
196	return op._evalFn(self, other)	1✔
197	else:
198	if s_t.signed is not o_t.signed and bool(s_t.signed) == bool(o_t.signed):	1✔
199	# automatically cast unsigned to vector
200	if s_t.signed == False and o_t.signed is None:	1!
UNCOV 201	self = self._vec()	×
202	s_t = self._dtype	×
203	elif s_t.signed is None and o_t.signed == False:	1!
204	other = other._vec()	1✔
205	o_t = other._dtype	1✔
206	else:
UNCOV 207	raise ValueError("Invalid value for signed flag of type", s_t.signed, o_t.signed, s_t, o_t)	×
208
209	if s_t == o_t:	1✔
210	# due to previsous cast the type may become the same
211	pass	1✔
212	elif s_t.bit_length() == 1 and o_t.bit_length() == 1\	1!
213	and s_t.signed is o_t.signed \
214	and s_t.force_vector != o_t.force_vector:
215	# automatically cast to vector with a single item to a single bit
216	if s_t.force_vector:	1✔
217	self = self[0]	1✔
218	else:
219	other = other[0]	1✔
220
221	else:
UNCOV 222	raise TypeError("Can not apply operator %r (%r, %r)" %	×
223	(op, self._dtype, other._dtype))
224
225	if otherIsVal:	1✔
226	r = reduceValCheckFn(self, other)	1✔
227	if r is not None:	1✔
228	return r	1✔
229
230	elif iamVal:	1✔
231	r = reduceValCheckFn(other, self)	1✔
232	if r is not None:	1✔
233	return r	1✔
234
235	else:
236	_self, _self_n = extractNegation(self)	1✔
237	_other, _other_n = extractNegation(other)	1✔
238	if _self is _other:	1✔
239	return reduceSigCheckFn(self, _self_n, _other_n)	1✔
240
241	return Operator.withRes(op, [self, other], self._dtype)	1✔
242
243
244	@internal	1✔
245	def bitsArithOp(self, other, op):	1✔
246	other = toHVal(other, self._dtype)	1✔
247	if not isinstance(other._dtype, Bits):	1!
UNCOV 248	raise TypeError(other._dtype)	×
249
250	self_is_val = isinstance(self, HValue)	1✔
251	other_is_val = isinstance(other, HValue)	1✔
252
253	if self_is_val and other_is_val:	1✔
254	return bitsArithOp__val(self, other, op._evalFn)	1✔
255	else:
256	if self._dtype.signed is None:	1✔
257	self = self._unsigned()	1✔
258
259	if op in (AllOps.ADD, AllOps.SUB) and other_is_val and other._is_full_valid() and int(other) == 0:	1✔
260	return self	1✔
261
262	resT = self._dtype	1✔
263	if op == AllOps.ADD and self_is_val and self._is_full_valid() and int(self) == 0:	1✔
264	return other._auto_cast(resT)	1✔
265
266	if isinstance(other._dtype, Bits):	1!
267	t0 = self._dtype	1✔
268	t1 = other._dtype	1✔
269	if t0.bit_length() != t1.bit_length():	1!
270	if not t1.strict_width:	×
271	# resize to type of this
272	other = other._auto_cast(t1)	×
273	t1 = other._dtype	×
274	pass	×
UNCOV 275	elif not t0.strict_width:	×
276	# resize self to type of result
UNCOV 277	self = self._auto_cast(t0)	×
UNCOV 278	t0 = self._dtype	×
UNCOV 279	pass	×
280	else:
281	raise TypeError("%r %r %r" % (self, op, other))	×
282
283	if t1.signed != resT.signed:	1✔
284	other = other._convSign(t0.signed)	1✔
285	else:
UNCOV 286	raise TypeError("%r %r %r" % (self, op, other))	×
287
288	o = Operator.withRes(op, [self, other], self._dtype)	1✔
289	return o._auto_cast(resT)	1✔

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