6971162184

Committed 23 Nov 2023 02:02PM UTC coverage: 84.22% (+0.6%) from 83.65%

Build # 6971162184

Build Type

Pull #516

github

Committed by

Christian-B

Commit Message

by default n_atoms == app_vertex.get_max_atoms_per_core

Pull Request Pull Request #516: Interdimensional compatibility

Run Details

1572 of 2046 branches covered (0.0%)

Branch coverage included in aggregate %.

128 of 157 new or added lines in 12 files covered. (81.53%)

12 existing lines in 4 files now uncovered.

5137 of 5920 relevant lines covered (86.77%)

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68.42

/pacman/model/graphs/application/application_2d_fpga_vertex.py

# Copyright (c) 2017 The University of Manchester
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#     https://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.

from typing import List, Optional
from spinn_utilities.overrides import overrides
from .application_fpga_vertex import ApplicationFPGAVertex
from pacman.model.graphs.application.abstract import Abstract2DDeviceVertex
from .fpga_connection import FPGAConnection
from pacman.model.graphs.common import Slice


class Application2DFPGAVertex(ApplicationFPGAVertex, Abstract2DDeviceVertex):
    """
    A device connected to an FPGA with input or output in two dimensions.
    """

    __slots__ = (
        "__width",
        "__height",
        "__sub_width",
        "__sub_height")

    def __init__(
            self, width: int, height: int, sub_width: int, sub_height: int,
            incoming_fpga_connections: Optional[List[FPGAConnection]] = None,
            outgoing_fpga_connection: Optional[FPGAConnection] = None,
            label: Optional[str] = None):
        """
        :param int width: The width of the vertex in atoms
        :param int height: The height of the vertex in atoms
        :param int sub_width:
            The width of the sub-rectangle to break the vertex up into
        :param int sub_height:
            The height of the sub-rectangle to break the vertex up into
        :param incoming_fpga_connections:
            The connections from one or more FPGAs that that packets are
            expected to be received from for this device, or `None` if no
            incoming traffic is expected from the device
        :type incoming_fpga_connections:
            list(~pacman.model.graphs.application.FPGAConnection) or None
        :param outgoing_fpga_connection:
            The connection to an FPGA that packets to be sent to this device
            should be sent down, or `None` if no outgoing traffic is expected
            to be sent to the device.
        :type outgoing_fpga_connection:
            ~pacman.model.graphs.application.FPGAConnection or None
        :param str label: The optional name of the vertex.
        """
        # Set variables first as this lets us call properties
        self.__width = width
        self.__height = height
        self.__sub_width = sub_width
        self.__sub_height = sub_height
        super().__init__(
            width * height, incoming_fpga_connections,
            outgoing_fpga_connection, label,
            n_machine_vertices_per_link=self._n_sub_rectangles)
        self._verify_sub_size()

    @property
    @overrides(Abstract2DDeviceVertex.width)
    def width(self) -> int:
        return self.__width

    @property
    @overrides(Abstract2DDeviceVertex.height)
    def height(self) -> int:
        return self.__height

    @property
    @overrides(Abstract2DDeviceVertex.sub_width)
    def sub_width(self) -> int:
        return self.__sub_width

    @property
    @overrides(Abstract2DDeviceVertex.sub_height)
    def sub_height(self) -> int:
        return self.__sub_height

    @property
    @overrides(ApplicationFPGAVertex.atoms_shape)
    def atoms_shape(self):
        return (self.__width, self.__height)

    @overrides(ApplicationFPGAVertex.get_incoming_slice_for_link)
    def get_incoming_slice_for_link(
            self, link: FPGAConnection, index: int) -> Slice:
        return self._get_slice(index)

1	# Copyright (c) 2017 The University of Manchester
2	#
3	# Licensed under the Apache License, Version 2.0 (the "License");
4	# you may not use this file except in compliance with the License.
5	# You may obtain a copy of the License at
6	#
7	# https://www.apache.org/licenses/LICENSE-2.0
8	#
9	# Unless required by applicable law or agreed to in writing, software
10	# distributed under the License is distributed on an "AS IS" BASIS,
11	# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12	# See the License for the specific language governing permissions and
13	# limitations under the License.
14
15	from typing import List, Optional	1✔
16	from spinn_utilities.overrides import overrides	1✔
17	from .application_fpga_vertex import ApplicationFPGAVertex	1✔
18	from pacman.model.graphs.application.abstract import Abstract2DDeviceVertex	1✔
19	from .fpga_connection import FPGAConnection	1✔
20	from pacman.model.graphs.common import Slice	1✔
21
22
23	class Application2DFPGAVertex(ApplicationFPGAVertex, Abstract2DDeviceVertex):	1✔
24	"""
25	A device connected to an FPGA with input or output in two dimensions.
26	"""
27
28	__slots__ = (	1✔
29	"__width",
30	"__height",
31	"__sub_width",
32	"__sub_height")
33
34	def __init__(	1✔
35	self, width: int, height: int, sub_width: int, sub_height: int,
36	incoming_fpga_connections: Optional[List[FPGAConnection]] = None,
37	outgoing_fpga_connection: Optional[FPGAConnection] = None,
38	label: Optional[str] = None):
39	"""
40	:param int width: The width of the vertex in atoms
41	:param int height: The height of the vertex in atoms
42	:param int sub_width:
43	The width of the sub-rectangle to break the vertex up into
44	:param int sub_height:
45	The height of the sub-rectangle to break the vertex up into
46	:param incoming_fpga_connections:
47	The connections from one or more FPGAs that that packets are
48	expected to be received from for this device, or `None` if no
49	incoming traffic is expected from the device
50	:type incoming_fpga_connections:
51	list(~pacman.model.graphs.application.FPGAConnection) or None
52	:param outgoing_fpga_connection:
53	The connection to an FPGA that packets to be sent to this device
54	should be sent down, or `None` if no outgoing traffic is expected
55	to be sent to the device.
56	:type outgoing_fpga_connection:
57	~pacman.model.graphs.application.FPGAConnection or None
58	:param str label: The optional name of the vertex.
59	"""
60	# Set variables first as this lets us call properties
61	self.__width = width	×
62	self.__height = height	×
63	self.__sub_width = sub_width	×
64	self.__sub_height = sub_height	×
65	super().__init__(	×
66	width * height, incoming_fpga_connections,
67	outgoing_fpga_connection, label,
68	n_machine_vertices_per_link=self._n_sub_rectangles)
69	self._verify_sub_size()	×
70
71	@property	1✔
72	@overrides(Abstract2DDeviceVertex.width)	1✔
73	def width(self) -> int:	1✔
UNCOV 74	return self.__width	×
75
76	@property	1✔
77	@overrides(Abstract2DDeviceVertex.height)	1✔
78	def height(self) -> int:	1✔
UNCOV 79	return self.__height	×
80
81	@property	1✔
82	@overrides(Abstract2DDeviceVertex.sub_width)	1✔
83	def sub_width(self) -> int:	1✔
UNCOV 84	return self.__sub_width	×
85
86	@property	1✔
87	@overrides(Abstract2DDeviceVertex.sub_height)	1✔
88	def sub_height(self) -> int:	1✔
UNCOV 89	return self.__sub_height	×
90
91	@property	1✔
92	@overrides(ApplicationFPGAVertex.atoms_shape)	1✔
93	def atoms_shape(self):	1✔
94	return (self.__width, self.__height)	×
95
96	@overrides(ApplicationFPGAVertex.get_incoming_slice_for_link)	1✔
97	def get_incoming_slice_for_link(	1✔
98	self, link: FPGAConnection, index: int) -> Slice:
99	return self._get_slice(index)	×

SpiNNakerManchester / PACMAN / 6971162184

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