5525461133

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Build # 5525461133

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shellcraft: more explicit sleep.asm docstring (#2226)

This commit adds information that the sleep shellcraft function does not check if it returned as part of an interrupt and it does not retry the syscall if this occured.

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14.48

/pwnlib/encoders/arm/alphanumeric/ARM_Instructions.py

1	# Copyright (c) 2013 Pratik Kumar Sahu, Nagendra Chowdary, Anish Mathuria
2	# Ported to Python by Gallopsled
3	from __future__ import division	1✔
4
5	# +------------------------------------------------------------------------+
6	# \| ARM Instructions \|
7	# +------------------------------------------------------------------------+
8
9
10	EOR = 1	1✔
11	SUB = 2	1✔
12	RSB = 3	1✔
13	MI = 4	1✔
14	PL = 5	1✔
15	LDR = 6	1✔
16	STR = 7	1✔
17	LDM = 8	1✔
18	STM = 9	1✔
19	ROR = 10	1✔
20	LSR = 11	1✔
21
22	# (EOR/SUB/RSB)(PL/MI){S} rd, rn, #imm
23	# ====================================
24	def dpimm(op, cond, s, d, n, imm):	1✔
25	if type(imm) == int:	×
26	x = chr(imm & 0xff)	×
27	else:
28	x = imm	×
29	x += chr((d << 4) & 0xff)	×
30	if s:	×
31	if op == EOR:	×
32	x += chr(0x30 \| n)	×
33	if op == SUB:	×
34	x += chr(0x50 \| n)	×
35	if op == RSB:	×
36	x += chr(0x70 \| n)	×
37	else:
38	if op == SUB:	×
39	x += chr(0x40 \| n)	×
40	if op == RSB:	×
41	x += chr(0x60 \| n)	×
42	if cond == PL:	×
43	x += "\x52"	×
44	else:
45	x += "\x42"	×
46	return x	×
47
48	# (EOR/SUB/RSB)PL{S} rd, rn, ra ROR #imm
49	# ======================================
50	def dpshiftimm(op, s, d, n, a, imm):	1✔
51	x = chr(0x60 \| a)	×
52	x += chr(((d << 4)\| (imm >> 1)) & 0xff)	×
53	if s:	×
54	if op == EOR:	×
55	x += chr(0x30 \| n)	×
56	if op == SUB:	×
57	x += chr(0x50 \| n)	×
58	if op == RSB:	×
59	x += chr(0x70 \| n)	×
60	else:
61	if op == SUB:	×
62	x += chr(0x40 \| n)	×
63	if op == RSB:	×
64	x += chr(0x60 \| n)	×
65	return x + "\x50"	×
66
67	# (EOR/SUB/RSB)PL{S} rd, rn, ra (ROR/LSR) rb
68	# ==========================================
69	def dpshiftreg(op, s, d, n, a, shift, b):	1✔
70	x = ''	×
71	if shift == LSR:	×
72	x += chr(0x30 \| a)	×
73	else:
74	x += chr(0x70 \| a)	×
75	x += chr(((d << 4) \| b) & 0xff)	×
76	if s != 0:	×
77	if op == EOR:	×
78	x += chr(0x30 \| n)	×
79	if op == SUB:	×
80	x += chr(0x50 \| n)	×
81	if op == RSB:	×
82	x += chr(0x70 \| n)	×
83	else:
84	if op == SUB:	×
85	x += chr(0x40 \| n)	×
86	if op == RSB:	×
87	x += chr(0x60 \| n)	×
88	return x + "\x50"	×
89
90	# (LDR/STR)(PL/MI)B rd, [rn, #-imm]
91	# =================================
92	def lsbyte(op, cond, d, n, imm):	1✔
93	if type(imm) == int:	×
94	x = chr(imm & 0xff)	×
95	else:
96	x = imm	×
97	x += chr((d << 4) & 0xff)	×
98	# x = chr(imm) + chr((d << 4) & 0xff)
99	if op == STR:	×
100	x += chr(0x40 \| n)	×
101	else:
102	x += chr(0x50 \| n)	×
103	if cond == PL:	×
104	x += "\x55"	×
105	else:
106	x += "\x45"	×
107	return x	×
108
109	# STMPLFD rd, (Register List)^
110	# ============================
111	def smul(d, reglH, reglL):	1✔
112	return chr(reglL) + chr(reglH) + chr(0x40 \| d) + "\x59"	×
113
114	# LDMPLDB rn!, (Register List)
115	# ============================
116	def lmul(n, reglH, reglL):	1✔
117	return chr(reglL) + chr(reglH) + chr(0x30 \| n) + "\x59"	×
118
119	# SWI(PL/MI) 0x9f0002
120	# ==============
121	def swi(cond):	1✔
122	x = "\x02\x00\x9f"	×
123	if cond == MI:	×
124	x += "\x4f"	×
125	else:
126	x += "\x5f"	×
127	return x	×
128
129	# BMI 0xfffff4
130	# ============
131	def bmi():	1✔
132	return "\xf4\xff\xff\x4b"	×
133
134	# STRPLB rd, [!rn, -(rm ROR #imm)] with P=0 i.e. post-indexed addressing mode
135	# ===========================================================================
136	def sbyteposti(d, n, m, imm):	1✔
137	x = chr(0x60 \| m)	×
138	x += chr(((d << 4) \| (imm >> 1)) & 0xff)	×
139	x += chr(0x40 \| n)	×
140	x += "\x56"	×
141	return x	×

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