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Nic30 / hwtLib / 170208f5-5e39-4024-ae82-f3378a16eefe

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170208f5-5e39-4024-ae82-f3378a16eefe

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Nic30
StreamNode.__repr__: improve readability

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96.77
/hwtLib/examples/specialIntfTypes/intfWithArray.py
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#!/usr/bin/env python3
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# -*- coding: utf-8 -*-
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from hwt.interfaces.std import Signal
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from hwt.serializer.vhdl import ToHdlAstVhdl2008
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from hwt.synthesizer.hObjList import HObjList
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from hwt.synthesizer.param import Param
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from hwt.synthesizer.unit import Unit
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from hwtLib.types.ctypes import uint8_t
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from hdlConvertorAst.hdlAst._expr import HdlValueId, HdlOp, HdlOpType
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from hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.utils import hdl_index,\
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    hdl_downto
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from hwtLib.examples.base_serialization_TC import BaseSerializationTC
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# class Interface1d(Unit):
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#
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#     def _config(self):
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#         self.SIZE = Param(3)
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#
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#     def _declr(self):
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#         self.din = Signal(dtype=uint8_t[self.SIZE])
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#         self.dout = HObjList([Signal(dtype=uint8_t)._m()
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#                               for _ in range(self.SIZE)])
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#
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#     def _impl(self):
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#         for i in range(self.SIZE):
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#             o = self.din[i]
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#             self.dout[i](o)
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# class Interface2d(Unit):
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#
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#     def _config(self):
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#         self.SIZE_X = Param(3)
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#         self.SIZE_Y = Param(3)
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#
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#     def _declr(self):
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#         self.din = Signal(dtype=uint8_t[self.SIZE_X][self.SIZE_Y])
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#         self.dout = HObjList([
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#             HObjList([
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#                 Signal(dtype=uint8_t)._m()
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#                 for _ in range(self.SIZE_Y)])
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#             for _ in range(self.SIZE_X)
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#         ])
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#
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#     def _impl(self):
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#         # for x in range(self.SIZE_X):
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#         #     for y in range(self.SIZE_Y):
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#         #         o = self.din[x][y]
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#         #         self.dout[x][y](o)
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#
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#         for x_in, x_out in zip(self.din, self.dout):
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#             for d_in, d_out in zip(x_in, x_out):
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#                 d_out(d_in)
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def example_use_vhdl_declared_array1d(SIZE_X):
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    array1d_t = uint8_t[SIZE_X]
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    def array1d_t_to_vhdl(to_hdl: ToHdlAstVhdl2008, declaration=False):
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        if not isinstance(to_hdl, ToHdlAstVhdl2008):
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            raise NotImplementedError()
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        if declaration:
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            raise ValueError(
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                "_as_hdl_requires_def specifies that this should not be required")
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        # "mem(0 to %d)(%d downto 0)" % (t.size, t.element_t.bit_length() - 1)
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        _int = to_hdl.as_hdl_int
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        size = HdlOp(HdlOpType.TO, [_int(0), _int(int(array1d_t.size))])
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        e_width = hdl_downto(
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            _int(array1d_t.element_t.bit_length() - 1), _int(0))
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        return hdl_index(hdl_index(HdlValueId("mem"), size), e_width)
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    def array1d_t_as_hdl_requires_def(to_hdl: ToHdlAstVhdl2008, other_types: list):
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        return False
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    array1d_t._as_hdl = array1d_t_to_vhdl
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    array1d_t._as_hdl_requires_def = array1d_t_as_hdl_requires_def
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    return array1d_t
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class InterfaceWithVHDLUnconstrainedArrayImportedType(Unit):
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    def _config(self):
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        self.SIZE_X = Param(3)
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    def _declr(self):
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        # lets suppose that there is some package which has vhdl type defined as:
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        #   type data_vector is array (natural range <>, natural range <>) of integer;
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        #   type mem is array(natural range <>) of std_logic_vector;
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        # We would like to use this type in HWT, but there is no explicit support for vhdl 2008
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        # unconstrained multi dim. arrays or external VHDL types.
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        # But we need to our interface with type like this:
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        #   signal our_interface: mem(0 to 15)(7 downto 0);
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        # so we are actually able to connect this component to existing design.
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        # In this example we will mock the type with HWT array type and override
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        # serialization so we will get desired type name in VHDL.
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        array1d_t = example_use_vhdl_declared_array1d(self.SIZE_X)
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        self.din = Signal(dtype=array1d_t)
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        self.dout = HObjList([
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            Signal(dtype=uint8_t)._m()
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            for _ in range(self.SIZE_X)
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        ])
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    def _impl(self):
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        for d_in, d_out in zip(self.din, self.dout):
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            d_out(d_in)
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class InterfaceWithVHDLUnconstrainedArrayImportedType2(Unit):
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    def _config(self):
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        self.SIZE_X = Param(3)
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    def _declr(self):
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        array1d_t = example_use_vhdl_declared_array1d(self.SIZE_X)
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        self.dout = Signal(dtype=array1d_t)._m()
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        self.din = HObjList([
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            Signal(dtype=uint8_t)
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            for _ in range(self.SIZE_X)
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        ])
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    def _impl(self):
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        for d_in, d_out in zip(self.din, self.dout):
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            d_out(d_in)
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class InterfaceWithArrayTypesTC(BaseSerializationTC):
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    __FILE__ = __file__
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    def test_InterfaceWithVHDLUnconstrainedArrayImportedType(self):
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        u = InterfaceWithVHDLUnconstrainedArrayImportedType()
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        self.assert_serializes_as_file(
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            u, "InterfaceWithVHDLUnconstrainedArrayImportedType.vhd")
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    def test_InterfaceWithVHDLUnconstrainedArrayImportedType2(self):
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        u = InterfaceWithVHDLUnconstrainedArrayImportedType2()
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        self.assert_serializes_as_file(
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            u, "InterfaceWithVHDLUnconstrainedArrayImportedType2.vhd")
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if __name__ == "__main__":
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    import unittest
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    testLoader = unittest.TestLoader()
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    suite = testLoader.loadTestsFromTestCase(InterfaceWithArrayTypesTC)
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    runner = unittest.TextTestRunner(verbosity=3)
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    runner.run(suite)
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    # print(to_rtl_str(Interface1d()))
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    # print(to_rtl_str(Interface2d()))
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    # print(to_rtl_str(InterfaceWithVHDLUnconstrainedArrayImportedType()))
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    # print(to_rtl_str(InterfaceWithVHDLUnconstrainedArrayImportedType2()))
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